A flash ADC tolerant to high offset voltage comparators
Autor(a) principal: | |
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Data de Publicação: | 2017 |
Outros Autores: | , , |
Tipo de documento: | Artigo |
Idioma: | eng |
Título da fonte: | Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
Texto Completo: | http://hdl.handle.net/10400.21/7017 |
Resumo: | A conventional flash analog-to-digital converter (ADC) with a Wallace tree encoder ensures monotonicity and avoids missing codes, but still requires comparators with low offset voltage, which implies high area and power consumption. In this paper, we extend the purpose of this flash implementation, to allow the comparators to have extremely high offset voltages. This leads to a new approach toward the design of a flash ADC that does not require any type of calibration, allow easy porting among technologies and benefits from scaling. A statistical study is presented to demonstrate the effectiveness of the new method, and a modification is proposed to ensure full-range operation. It is shown that a proposed N-bit ADC has a performance equivalent to an (N−m)(N−m)-bit conventional flash ADC, with considerable gains in area and power consumption, with less design effort. The design flow of the OST ADC, with the necessary steps, is presented. A circuit, employing minimum dimension transistors, was fabricated in 0.13-μmμm CMOS and used as a proof of concept for the ADCs proposed here. |
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A flash ADC tolerant to high offset voltage comparatorsAnalog–digital conversionFlash ADCWallace treeStochastic errorsOffset voltageA conventional flash analog-to-digital converter (ADC) with a Wallace tree encoder ensures monotonicity and avoids missing codes, but still requires comparators with low offset voltage, which implies high area and power consumption. In this paper, we extend the purpose of this flash implementation, to allow the comparators to have extremely high offset voltages. This leads to a new approach toward the design of a flash ADC that does not require any type of calibration, allow easy porting among technologies and benefits from scaling. A statistical study is presented to demonstrate the effectiveness of the new method, and a modification is proposed to ensure full-range operation. It is shown that a proposed N-bit ADC has a performance equivalent to an (N−m)(N−m)-bit conventional flash ADC, with considerable gains in area and power consumption, with less design effort. The design flow of the OST ADC, with the necessary steps, is presented. A circuit, employing minimum dimension transistors, was fabricated in 0.13-μmμm CMOS and used as a proof of concept for the ADCs proposed here.PEst-OE/EEI/LA0021/2013EXCL/EEI-ELC/0261/2012Springer VerlagRCIPLCouto-Pinto, AntonioFernandes, JorgePiedade, MoisesSilva, Manuel M.2017-05-17T10:48:09Z2017-032017-03-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10400.21/7017engCOUTO-PINTO, António; FERNANDES, Jorge R.; PIEDADE, Moisés; SILVA, Manuel M. - A flash ADC tolerant to high offset voltage comparators. Circuits Systems and Signal Processing. ISSN 0278-081X. Vol. 36, N. º 3 (2017), pp. 1150–11680278-081X10.1007/s00034-016-0350-3metadata only accessinfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-08-03T09:52:32Zoai:repositorio.ipl.pt:10400.21/7017Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T20:16:03.633534Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse |
dc.title.none.fl_str_mv |
A flash ADC tolerant to high offset voltage comparators |
title |
A flash ADC tolerant to high offset voltage comparators |
spellingShingle |
A flash ADC tolerant to high offset voltage comparators Couto-Pinto, Antonio Analog–digital conversion Flash ADC Wallace tree Stochastic errors Offset voltage |
title_short |
A flash ADC tolerant to high offset voltage comparators |
title_full |
A flash ADC tolerant to high offset voltage comparators |
title_fullStr |
A flash ADC tolerant to high offset voltage comparators |
title_full_unstemmed |
A flash ADC tolerant to high offset voltage comparators |
title_sort |
A flash ADC tolerant to high offset voltage comparators |
author |
Couto-Pinto, Antonio |
author_facet |
Couto-Pinto, Antonio Fernandes, Jorge Piedade, Moises Silva, Manuel M. |
author_role |
author |
author2 |
Fernandes, Jorge Piedade, Moises Silva, Manuel M. |
author2_role |
author author author |
dc.contributor.none.fl_str_mv |
RCIPL |
dc.contributor.author.fl_str_mv |
Couto-Pinto, Antonio Fernandes, Jorge Piedade, Moises Silva, Manuel M. |
dc.subject.por.fl_str_mv |
Analog–digital conversion Flash ADC Wallace tree Stochastic errors Offset voltage |
topic |
Analog–digital conversion Flash ADC Wallace tree Stochastic errors Offset voltage |
description |
A conventional flash analog-to-digital converter (ADC) with a Wallace tree encoder ensures monotonicity and avoids missing codes, but still requires comparators with low offset voltage, which implies high area and power consumption. In this paper, we extend the purpose of this flash implementation, to allow the comparators to have extremely high offset voltages. This leads to a new approach toward the design of a flash ADC that does not require any type of calibration, allow easy porting among technologies and benefits from scaling. A statistical study is presented to demonstrate the effectiveness of the new method, and a modification is proposed to ensure full-range operation. It is shown that a proposed N-bit ADC has a performance equivalent to an (N−m)(N−m)-bit conventional flash ADC, with considerable gains in area and power consumption, with less design effort. The design flow of the OST ADC, with the necessary steps, is presented. A circuit, employing minimum dimension transistors, was fabricated in 0.13-μmμm CMOS and used as a proof of concept for the ADCs proposed here. |
publishDate |
2017 |
dc.date.none.fl_str_mv |
2017-05-17T10:48:09Z 2017-03 2017-03-01T00:00:00Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article |
format |
article |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://hdl.handle.net/10400.21/7017 |
url |
http://hdl.handle.net/10400.21/7017 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
COUTO-PINTO, António; FERNANDES, Jorge R.; PIEDADE, Moisés; SILVA, Manuel M. - A flash ADC tolerant to high offset voltage comparators. Circuits Systems and Signal Processing. ISSN 0278-081X. Vol. 36, N. º 3 (2017), pp. 1150–1168 0278-081X 10.1007/s00034-016-0350-3 |
dc.rights.driver.fl_str_mv |
metadata only access info:eu-repo/semantics/openAccess |
rights_invalid_str_mv |
metadata only access |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
application/pdf |
dc.publisher.none.fl_str_mv |
Springer Verlag |
publisher.none.fl_str_mv |
Springer Verlag |
dc.source.none.fl_str_mv |
reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação instacron:RCAAP |
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Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
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RCAAP |
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RCAAP |
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Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
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Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
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Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
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1799133419907579904 |