A remote demonstrator for dynamic FPGA reconfiguration

Detalhes bibliográficos
Autor(a) principal: Hugo Marques
Data de Publicação: 2013
Outros Autores: João Canas Ferreira
Tipo de documento: Livro
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: https://repositorio-aberto.up.pt/handle/10216/70153
Resumo: This paper presents a demonstrator for partial reconfiguration of FPGAs applied to image processing tasks. The main goal of the project is to develop an environment whichallows users to assess some of the advantages of using dynamic reconfiguration. The demonstration platform is built around a Xilinx Virtex-5 FPGA, which is used to implement a chain of four reconfigurable filters for processing images. Using a graphical interface, the user can choose which filter goes into which reconfigurable slot, submit images for processing and visualize the outcome of the whole process.
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spelling A remote demonstrator for dynamic FPGA reconfigurationEngenharia electrotécnica, electrónica e informáticaElectrical engineering, Electronic engineering, Information engineeringThis paper presents a demonstrator for partial reconfiguration of FPGAs applied to image processing tasks. The main goal of the project is to develop an environment whichallows users to assess some of the advantages of using dynamic reconfiguration. The demonstration platform is built around a Xilinx Virtex-5 FPGA, which is used to implement a chain of four reconfigurable filters for processing images. Using a graphical interface, the user can choose which filter goes into which reconfigurable slot, submit images for processing and visualize the outcome of the whole process.20132013-01-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/bookapplication/pdfhttps://repositorio-aberto.up.pt/handle/10216/70153engHugo MarquesJoão Canas Ferreirainfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-11-29T13:33:45Zoai:repositorio-aberto.up.pt:10216/70153Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T23:42:40.793185Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv A remote demonstrator for dynamic FPGA reconfiguration
title A remote demonstrator for dynamic FPGA reconfiguration
spellingShingle A remote demonstrator for dynamic FPGA reconfiguration
Hugo Marques
Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
title_short A remote demonstrator for dynamic FPGA reconfiguration
title_full A remote demonstrator for dynamic FPGA reconfiguration
title_fullStr A remote demonstrator for dynamic FPGA reconfiguration
title_full_unstemmed A remote demonstrator for dynamic FPGA reconfiguration
title_sort A remote demonstrator for dynamic FPGA reconfiguration
author Hugo Marques
author_facet Hugo Marques
João Canas Ferreira
author_role author
author2 João Canas Ferreira
author2_role author
dc.contributor.author.fl_str_mv Hugo Marques
João Canas Ferreira
dc.subject.por.fl_str_mv Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
topic Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
description This paper presents a demonstrator for partial reconfiguration of FPGAs applied to image processing tasks. The main goal of the project is to develop an environment whichallows users to assess some of the advantages of using dynamic reconfiguration. The demonstration platform is built around a Xilinx Virtex-5 FPGA, which is used to implement a chain of four reconfigurable filters for processing images. Using a graphical interface, the user can choose which filter goes into which reconfigurable slot, submit images for processing and visualize the outcome of the whole process.
publishDate 2013
dc.date.none.fl_str_mv 2013
2013-01-01T00:00:00Z
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dc.identifier.uri.fl_str_mv https://repositorio-aberto.up.pt/handle/10216/70153
url https://repositorio-aberto.up.pt/handle/10216/70153
dc.language.iso.fl_str_mv eng
language eng
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
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