An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADC

Detalhes bibliográficos
Autor(a) principal: Da Silva, Denis Rogerio [UNESP]
Data de Publicação: 2016
Outros Autores: Oki, Nobuo [UNESP]
Tipo de documento: Artigo de conferência
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://dx.doi.org/10.1109/DCIS.2015.7388613
http://hdl.handle.net/11449/177965
Resumo: An amplifier and capacitor sharing technique with applications in a multiplying digital-to-analog converter (MDAC) of CMOS pipelined ACDC is presented. The amplifier used in this implementation is a recycling amplifier based on the folded cascode operational amplifier with gain improved using positive feedback. The operational amplifier designed in 0.35um CMOS process show a simulated gain of 75 dB, frequency bandwidth of 95 MHz, phase margin of 75 degree and power consumption of 0.75 mW on a 1.8V power supply. The simulation results in MDAC of 1.5 bits show that this configuration can be used in a implementation of a 10 bits 10 MSample/s CMOS pipelined ADC with 2.8 mW power consumption (analog part) on a 1.8V supply.
id UNSP_3d07af4950ae811a92c01fb3780dd311
oai_identifier_str oai:repositorio.unesp.br:11449/177965
network_acronym_str UNSP
network_name_str Repositório Institucional da UNESP
repository_id_str 2946
spelling An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADCfolded cascode opamppipeline ADC convertersharing opampAn amplifier and capacitor sharing technique with applications in a multiplying digital-to-analog converter (MDAC) of CMOS pipelined ACDC is presented. The amplifier used in this implementation is a recycling amplifier based on the folded cascode operational amplifier with gain improved using positive feedback. The operational amplifier designed in 0.35um CMOS process show a simulated gain of 75 dB, frequency bandwidth of 95 MHz, phase margin of 75 degree and power consumption of 0.75 mW on a 1.8V power supply. The simulation results in MDAC of 1.5 bits show that this configuration can be used in a implementation of a 10 bits 10 MSample/s CMOS pipelined ADC with 2.8 mW power consumption (analog part) on a 1.8V supply.Departament of Eletrical Engineering UNESP State of São Paulo UniversityCampus Tres Lagoas IFMS Instituto Federal de Mato Grosso Do suiDepartament of Eletrical Engineering UNESP State of São Paulo UniversityUniversidade Estadual Paulista (Unesp)IFMS Instituto Federal de Mato Grosso Do suiDa Silva, Denis Rogerio [UNESP]Oki, Nobuo [UNESP]2018-12-11T17:27:54Z2018-12-11T17:27:54Z2016-01-20info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObjecthttp://dx.doi.org/10.1109/DCIS.2015.73886132015 Conference on Design of Circuits and Integrated Systems, DCIS 2015.http://hdl.handle.net/11449/17796510.1109/DCIS.2015.73886132-s2.0-84963877257Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015info:eu-repo/semantics/openAccess2024-07-04T19:11:54Zoai:repositorio.unesp.br:11449/177965Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T22:28:24.464675Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADC
title An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADC
spellingShingle An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADC
Da Silva, Denis Rogerio [UNESP]
folded cascode opamp
pipeline ADC converter
sharing opamp
title_short An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADC
title_full An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADC
title_fullStr An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADC
title_full_unstemmed An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADC
title_sort An amplifier and capacitor sharing technique using recycling folded cascode operational amplifier with applications in MDAC of CMOS pipelined ADC
author Da Silva, Denis Rogerio [UNESP]
author_facet Da Silva, Denis Rogerio [UNESP]
Oki, Nobuo [UNESP]
author_role author
author2 Oki, Nobuo [UNESP]
author2_role author
dc.contributor.none.fl_str_mv Universidade Estadual Paulista (Unesp)
IFMS Instituto Federal de Mato Grosso Do sui
dc.contributor.author.fl_str_mv Da Silva, Denis Rogerio [UNESP]
Oki, Nobuo [UNESP]
dc.subject.por.fl_str_mv folded cascode opamp
pipeline ADC converter
sharing opamp
topic folded cascode opamp
pipeline ADC converter
sharing opamp
description An amplifier and capacitor sharing technique with applications in a multiplying digital-to-analog converter (MDAC) of CMOS pipelined ACDC is presented. The amplifier used in this implementation is a recycling amplifier based on the folded cascode operational amplifier with gain improved using positive feedback. The operational amplifier designed in 0.35um CMOS process show a simulated gain of 75 dB, frequency bandwidth of 95 MHz, phase margin of 75 degree and power consumption of 0.75 mW on a 1.8V power supply. The simulation results in MDAC of 1.5 bits show that this configuration can be used in a implementation of a 10 bits 10 MSample/s CMOS pipelined ADC with 2.8 mW power consumption (analog part) on a 1.8V supply.
publishDate 2016
dc.date.none.fl_str_mv 2016-01-20
2018-12-11T17:27:54Z
2018-12-11T17:27:54Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/conferenceObject
format conferenceObject
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://dx.doi.org/10.1109/DCIS.2015.7388613
2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015.
http://hdl.handle.net/11449/177965
10.1109/DCIS.2015.7388613
2-s2.0-84963877257
url http://dx.doi.org/10.1109/DCIS.2015.7388613
http://hdl.handle.net/11449/177965
identifier_str_mv 2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015.
10.1109/DCIS.2015.7388613
2-s2.0-84963877257
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.source.none.fl_str_mv Scopus
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
_version_ 1808129429518417920

Registros relacionados