A transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitation
Autor(a) principal: | |
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Data de Publicação: | 2012 |
Tipo de documento: | Tese |
Idioma: | eng |
Título da fonte: | Biblioteca Digital de Teses e Dissertações da UFRGS |
Texto Completo: | http://hdl.handle.net/10183/37178 |
Resumo: | As the number of embedded applications is increasing, the current strategy of several companies is to launch a new platform within short periods, to execute the application set more efficiently, with low energy consumption. However, for each new platform deployment, new tool chains must come along, with additional libraries, debuggers and compilers. This strategy implies in high hardware redesign costs, breaks binary compatibility and results in a high overhead in the software development process. Therefore, focusing on area savings, low energy consumption, binary compatibility maintenance and mainly software productivity improvement, we propose the exploitation of Custom Reconfigurable Arrays for Multiprocessor System (CReAMS). CReAMS is composed of multiple adaptive reconfigurable systems to efficiently explore Instruction and Thread Level Parallelism (ILP and TLP) at hardware level, in a totally transparent fashion. Conceived as homogeneous organization, CReAMS shows a reduction of 37% in energy-delay product (EDP) compared to an ordinary multiprocessing platform when assuming the same chip area. When a variety of processor with different capabilities on exploiting ILP are coupled in a single die, conceiving CReAMS as a heterogeneous organization, performance improvements of up to 57% and energy savings of up to 36% are showed in comparison with the homogenous platform. In addition, the efficiency of the adaptability provided by CReAMS is demonstrated in a comparison to a multiprocessing system composed of 4- issue Out-of-Order SparcV8 processors, 28% of performance improvements are shown considering a power budget scenario. |
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Rutzig, Mateus BeckCarro, Luigi2012-02-11T01:24:25Z2012http://hdl.handle.net/10183/37178000819304As the number of embedded applications is increasing, the current strategy of several companies is to launch a new platform within short periods, to execute the application set more efficiently, with low energy consumption. However, for each new platform deployment, new tool chains must come along, with additional libraries, debuggers and compilers. This strategy implies in high hardware redesign costs, breaks binary compatibility and results in a high overhead in the software development process. Therefore, focusing on area savings, low energy consumption, binary compatibility maintenance and mainly software productivity improvement, we propose the exploitation of Custom Reconfigurable Arrays for Multiprocessor System (CReAMS). CReAMS is composed of multiple adaptive reconfigurable systems to efficiently explore Instruction and Thread Level Parallelism (ILP and TLP) at hardware level, in a totally transparent fashion. Conceived as homogeneous organization, CReAMS shows a reduction of 37% in energy-delay product (EDP) compared to an ordinary multiprocessing platform when assuming the same chip area. When a variety of processor with different capabilities on exploiting ILP are coupled in a single die, conceiving CReAMS as a heterogeneous organization, performance improvements of up to 57% and energy savings of up to 36% are showed in comparison with the homogenous platform. In addition, the efficiency of the adaptability provided by CReAMS is demonstrated in a comparison to a multiprocessing system composed of 4- issue Out-of-Order SparcV8 processors, 28% of performance improvements are shown considering a power budget scenario.application/pdfengMultiprocessadoresMicroeletrônicaSistemas embarcadosMultiprocessorsReconfigurable architecturesInstruction and thread level parallelismA transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitationinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/doctoralThesisUniversidade Federal do Rio Grande do SulInstituto de InformáticaPrograma de Pós-Graduação em ComputaçãoPorto Alegre, BR-RS2012doutoradoinfo:eu-repo/semantics/openAccessreponame:Biblioteca Digital de Teses e Dissertações da UFRGSinstname:Universidade Federal do Rio Grande do Sul (UFRGS)instacron:UFRGSTEXT000819304.pdf.txt000819304.pdf.txtExtracted Texttext/plain302629http://www.lume.ufrgs.br/bitstream/10183/37178/2/000819304.pdf.txt1108d5cbcf37bb07dcdda122ece36495MD52ORIGINAL000819304.pdf000819304.pdfTexto completo (inglês)application/pdf1719782http://www.lume.ufrgs.br/bitstream/10183/37178/1/000819304.pdf889590bc3ec0d1ea8f7d2b3258d9ca72MD51THUMBNAIL000819304.pdf.jpg000819304.pdf.jpgGenerated Thumbnailimage/jpeg1101http://www.lume.ufrgs.br/bitstream/10183/37178/3/000819304.pdf.jpg9e9c42ee14f2752b9e764edfbb9794edMD5310183/371782021-05-07 04:36:44.994048oai:www.lume.ufrgs.br:10183/37178Biblioteca Digital de Teses e Dissertaçõeshttps://lume.ufrgs.br/handle/10183/2PUBhttps://lume.ufrgs.br/oai/requestlume@ufrgs.br||lume@ufrgs.bropendoar:18532021-05-07T07:36:44Biblioteca Digital de Teses e Dissertações da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS)false |
dc.title.pt_BR.fl_str_mv |
A transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitation |
title |
A transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitation |
spellingShingle |
A transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitation Rutzig, Mateus Beck Multiprocessadores Microeletrônica Sistemas embarcados Multiprocessors Reconfigurable architectures Instruction and thread level parallelism |
title_short |
A transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitation |
title_full |
A transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitation |
title_fullStr |
A transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitation |
title_full_unstemmed |
A transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitation |
title_sort |
A transparent and energy aware reconfigurable multiprocessor platform for efficient ILP and TLP exploitation |
author |
Rutzig, Mateus Beck |
author_facet |
Rutzig, Mateus Beck |
author_role |
author |
dc.contributor.author.fl_str_mv |
Rutzig, Mateus Beck |
dc.contributor.advisor1.fl_str_mv |
Carro, Luigi |
contributor_str_mv |
Carro, Luigi |
dc.subject.por.fl_str_mv |
Multiprocessadores Microeletrônica Sistemas embarcados |
topic |
Multiprocessadores Microeletrônica Sistemas embarcados Multiprocessors Reconfigurable architectures Instruction and thread level parallelism |
dc.subject.eng.fl_str_mv |
Multiprocessors Reconfigurable architectures Instruction and thread level parallelism |
description |
As the number of embedded applications is increasing, the current strategy of several companies is to launch a new platform within short periods, to execute the application set more efficiently, with low energy consumption. However, for each new platform deployment, new tool chains must come along, with additional libraries, debuggers and compilers. This strategy implies in high hardware redesign costs, breaks binary compatibility and results in a high overhead in the software development process. Therefore, focusing on area savings, low energy consumption, binary compatibility maintenance and mainly software productivity improvement, we propose the exploitation of Custom Reconfigurable Arrays for Multiprocessor System (CReAMS). CReAMS is composed of multiple adaptive reconfigurable systems to efficiently explore Instruction and Thread Level Parallelism (ILP and TLP) at hardware level, in a totally transparent fashion. Conceived as homogeneous organization, CReAMS shows a reduction of 37% in energy-delay product (EDP) compared to an ordinary multiprocessing platform when assuming the same chip area. When a variety of processor with different capabilities on exploiting ILP are coupled in a single die, conceiving CReAMS as a heterogeneous organization, performance improvements of up to 57% and energy savings of up to 36% are showed in comparison with the homogenous platform. In addition, the efficiency of the adaptability provided by CReAMS is demonstrated in a comparison to a multiprocessing system composed of 4- issue Out-of-Order SparcV8 processors, 28% of performance improvements are shown considering a power budget scenario. |
publishDate |
2012 |
dc.date.accessioned.fl_str_mv |
2012-02-11T01:24:25Z |
dc.date.issued.fl_str_mv |
2012 |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
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info:eu-repo/semantics/doctoralThesis |
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doctoralThesis |
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publishedVersion |
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