Characterization and modelling of long-term memory effects in GaN HEMTs
Autor(a) principal: | |
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Data de Publicação: | 2016 |
Tipo de documento: | Dissertação |
Idioma: | eng |
Título da fonte: | Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
Texto Completo: | http://hdl.handle.net/10773/18456 |
Resumo: | Gallium nitride (GaN) high electron mobility transistor (HEMT) technology has been revolutionizing the RF power amplifier (PA) market. Its potential, versus existing technologies, such as Silicon (Si) Laterally-Diffused MOS(LDMOS), is yet to be completely explored. However, the lack of good characterization and modelling of charge carrier trapping related phenomena has been hampering PA designers from extracting this technology’s promised performance. Hence, GaN HEMT trapping has been given a great amount of attention by the scientific and industrial worlds. This is mainly because the overall linearity of the PA built with this technology is affected, to a great extent, by the trapping state dependence on the device’s drain peak voltage. Circuit computer-aided design (CAD) tools are almost ubiquitous at research and development labs. However, these tools rely, not only on their simulation algorithms, but also on their built-in device models. This makes the development of accurate models a fundamental task. This work reports a multi-bias small-signal equivalent circuit (SSEC) model extraction procedure of a 3.3 W GaN HEMT from pulsed S-parameters as well as the development of a pulsed DC I-V measurement system and its use in the characterization of trapping-effects. This system, which is based on two pulser circuits, designed specifically for gate and drain pulsed measurements, was then automated through a MATLAB/PC controller. The pulser circuits allowed pulse widths on the microsecond scale at very low duty cycles as well as high peak voltages - close to 50 V - and currents - up to 4 A. With the developed system, isothermal standard pulsed I-V curves, as well as trapping-state dependent, isodynamic, pulsed I-V curves were obtained from a 15 W GaN HEMT device. In order to obtain the latter, the so-called double-pulse measurement technique was used. The expected asymmetric time constants associated with drain-lag were clearly observed: on the ns scale for the trapping and on the hundreds of milliseconds for the de-trapping. The predicted relatively reduced impact of gate-lag phenomena in more recent GaN HEMT technologies was also verified. |
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Characterization and modelling of long-term memory effects in GaN HEMTsAmplificadores de potênciaTransístoresGallium nitride (GaN) high electron mobility transistor (HEMT) technology has been revolutionizing the RF power amplifier (PA) market. Its potential, versus existing technologies, such as Silicon (Si) Laterally-Diffused MOS(LDMOS), is yet to be completely explored. However, the lack of good characterization and modelling of charge carrier trapping related phenomena has been hampering PA designers from extracting this technology’s promised performance. Hence, GaN HEMT trapping has been given a great amount of attention by the scientific and industrial worlds. This is mainly because the overall linearity of the PA built with this technology is affected, to a great extent, by the trapping state dependence on the device’s drain peak voltage. Circuit computer-aided design (CAD) tools are almost ubiquitous at research and development labs. However, these tools rely, not only on their simulation algorithms, but also on their built-in device models. This makes the development of accurate models a fundamental task. This work reports a multi-bias small-signal equivalent circuit (SSEC) model extraction procedure of a 3.3 W GaN HEMT from pulsed S-parameters as well as the development of a pulsed DC I-V measurement system and its use in the characterization of trapping-effects. This system, which is based on two pulser circuits, designed specifically for gate and drain pulsed measurements, was then automated through a MATLAB/PC controller. The pulser circuits allowed pulse widths on the microsecond scale at very low duty cycles as well as high peak voltages - close to 50 V - and currents - up to 4 A. With the developed system, isothermal standard pulsed I-V curves, as well as trapping-state dependent, isodynamic, pulsed I-V curves were obtained from a 15 W GaN HEMT device. In order to obtain the latter, the so-called double-pulse measurement technique was used. The expected asymmetric time constants associated with drain-lag were clearly observed: on the ns scale for the trapping and on the hundreds of milliseconds for the de-trapping. The predicted relatively reduced impact of gate-lag phenomena in more recent GaN HEMT technologies was also verified.A tecnologia GaN HEMT tem revolucionado o mercado dos amplificadores de potência para RF. O seu potencial, comparado com tecnologias anteriores, como a Si LDMOS, continua por ser completamente explorado. Contudo, a falta de uma boa caracterização e modelação dos efeitos de memória lenta causados pelo armadilhamento de cargas têm impedido o total aproveitamento desta tecnologia no desenho de amplificadores de potência. Consequentemente, estes fenómenos de armadilhamento têm sido alvo de um amplo estudo tanto a nível científico como industrial. Isto deve-se, sobretudo, porque a linearidade dos amplificadores baseados nesta tecnologia é bastante afectada pelo estado de armadilhamento de cargas no dispositivo, que, por sua vez, é definido pela tensão de pico na saída, drain, do transístor. As ferramentas de desenho de circuitos auxiliado por computador estão presentes na maioria dos laboratórios de investigação. No entanto, estas dependem não só dos seus algoritmos de simulação mas também, em larga medida, dos modelos nelas utilizados, tornando fundamental o desenvolvimento de melhores modelos. O presente documento descreve a extracção de um modelo de circuito equivalente de pequeno signal dependente da polarização, de um transístor GaN HEMT de 3.3 W, a partir de medidas de parâmetros-S pulsadas, assim como a construcção de um sistema de medidas pulsadas DC I-V e a utilização deste último na caracterização de efeitos de armadilhamento. O sistema desenvolvido, baseado em dois circuitos pulsadores desenhados para medidas pulsadas quer no terminal de entrada, gate, quer no de saída, drain, foi automatizado através do software MATLAB instalado num PC. Os circuitos pulsadores permitem larguras de pulso na escala dos microsegundos com duty-cycles tão pequenos como 0.001%, assim como, elevadas tensões de saída - perto de 50 V - e correntes - pelo menos até 4 A. Com o sistema desenvolvido, obtiveram-se curvas I-V iso-térmicas e também curvas I-V iso-dinâmicas, dependentes do estado de armadilhamento, de um transístor GaN HEMT de 15 W. De modo a obter as últimas, foram utilizadas medidas de duplo-pulso. A assimetria esperada nas constantes de tempo associadas com o drain-lag foram claramente observadas: na escala dos ns para o armadilhamento e das centenas de milisegundos para o desarmadilhamento. Tal como a literatura prevê para tecnologias mais recentes de GaN HEMTs, o impacto dos fenónemos de gate-lag que foi observado revelou-se bastante reduzido.Universidade de Aveiro2017-10-06T12:31:52Z2016-01-01T00:00:00Z2016info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/masterThesisapplication/pdfhttp://hdl.handle.net/10773/18456TID:201935058engGomes, José Miguel Alves Fariainfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-07-17T03:46:51ZPortal AgregadorONG |
dc.title.none.fl_str_mv |
Characterization and modelling of long-term memory effects in GaN HEMTs |
title |
Characterization and modelling of long-term memory effects in GaN HEMTs |
spellingShingle |
Characterization and modelling of long-term memory effects in GaN HEMTs Gomes, José Miguel Alves Faria Amplificadores de potência Transístores |
title_short |
Characterization and modelling of long-term memory effects in GaN HEMTs |
title_full |
Characterization and modelling of long-term memory effects in GaN HEMTs |
title_fullStr |
Characterization and modelling of long-term memory effects in GaN HEMTs |
title_full_unstemmed |
Characterization and modelling of long-term memory effects in GaN HEMTs |
title_sort |
Characterization and modelling of long-term memory effects in GaN HEMTs |
author |
Gomes, José Miguel Alves Faria |
author_facet |
Gomes, José Miguel Alves Faria |
author_role |
author |
dc.contributor.author.fl_str_mv |
Gomes, José Miguel Alves Faria |
dc.subject.por.fl_str_mv |
Amplificadores de potência Transístores |
topic |
Amplificadores de potência Transístores |
description |
Gallium nitride (GaN) high electron mobility transistor (HEMT) technology has been revolutionizing the RF power amplifier (PA) market. Its potential, versus existing technologies, such as Silicon (Si) Laterally-Diffused MOS(LDMOS), is yet to be completely explored. However, the lack of good characterization and modelling of charge carrier trapping related phenomena has been hampering PA designers from extracting this technology’s promised performance. Hence, GaN HEMT trapping has been given a great amount of attention by the scientific and industrial worlds. This is mainly because the overall linearity of the PA built with this technology is affected, to a great extent, by the trapping state dependence on the device’s drain peak voltage. Circuit computer-aided design (CAD) tools are almost ubiquitous at research and development labs. However, these tools rely, not only on their simulation algorithms, but also on their built-in device models. This makes the development of accurate models a fundamental task. This work reports a multi-bias small-signal equivalent circuit (SSEC) model extraction procedure of a 3.3 W GaN HEMT from pulsed S-parameters as well as the development of a pulsed DC I-V measurement system and its use in the characterization of trapping-effects. This system, which is based on two pulser circuits, designed specifically for gate and drain pulsed measurements, was then automated through a MATLAB/PC controller. The pulser circuits allowed pulse widths on the microsecond scale at very low duty cycles as well as high peak voltages - close to 50 V - and currents - up to 4 A. With the developed system, isothermal standard pulsed I-V curves, as well as trapping-state dependent, isodynamic, pulsed I-V curves were obtained from a 15 W GaN HEMT device. In order to obtain the latter, the so-called double-pulse measurement technique was used. The expected asymmetric time constants associated with drain-lag were clearly observed: on the ns scale for the trapping and on the hundreds of milliseconds for the de-trapping. The predicted relatively reduced impact of gate-lag phenomena in more recent GaN HEMT technologies was also verified. |
publishDate |
2016 |
dc.date.none.fl_str_mv |
2016-01-01T00:00:00Z 2016 2017-10-06T12:31:52Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/masterThesis |
format |
masterThesis |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://hdl.handle.net/10773/18456 TID:201935058 |
url |
http://hdl.handle.net/10773/18456 |
identifier_str_mv |
TID:201935058 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
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info:eu-repo/semantics/openAccess |
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openAccess |
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application/pdf |
dc.publisher.none.fl_str_mv |
Universidade de Aveiro |
publisher.none.fl_str_mv |
Universidade de Aveiro |
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reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação instacron:RCAAP |
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Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
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Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
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Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
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