A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device
Autor(a) principal: | |
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Data de Publicação: | 2005 |
Outros Autores: | |
Tipo de documento: | Artigo de conferência |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UNESP |
Texto Completo: | http://dx.doi.org/10.1109/PESC.2005.1581673 http://hdl.handle.net/11449/9747 |
Resumo: | This paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device. |
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A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA deviceThis paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.São Paulo State Univ, UNESP, FEIS, Dept Elect Engn, BR-15385000 Ilha Solteira, SP, BrazilSão Paulo State Univ, UNESP, FEIS, Dept Elect Engn, BR-15385000 Ilha Solteira, SP, BrazilIEEEUniversidade Estadual Paulista (Unesp)Canesin, C. A.Goncalves, FAS2014-05-20T13:29:02Z2014-05-20T13:29:02Z2005-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject513-518http://dx.doi.org/10.1109/PESC.2005.15816732005 IEEE 36th Power Electronic Specialists Conference (pesc), Vols 1-3. New York: IEEE, p. 513-518, 2005.0275-9306http://hdl.handle.net/11449/974710.1109/PESC.2005.1581673WOS:0002370365000816427185658143370Web of Sciencereponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng2005 IEEE 36th Power Electronic Specialists Conference (pesc), Vols 1-30,100info:eu-repo/semantics/openAccess2021-10-23T21:41:41Zoai:repositorio.unesp.br:11449/9747Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462021-10-23T21:41:41Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false |
dc.title.none.fl_str_mv |
A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device |
title |
A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device |
spellingShingle |
A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device Canesin, C. A. |
title_short |
A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device |
title_full |
A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device |
title_fullStr |
A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device |
title_full_unstemmed |
A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device |
title_sort |
A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device |
author |
Canesin, C. A. |
author_facet |
Canesin, C. A. Goncalves, FAS |
author_role |
author |
author2 |
Goncalves, FAS |
author2_role |
author |
dc.contributor.none.fl_str_mv |
Universidade Estadual Paulista (Unesp) |
dc.contributor.author.fl_str_mv |
Canesin, C. A. Goncalves, FAS |
description |
This paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device. |
publishDate |
2005 |
dc.date.none.fl_str_mv |
2005-01-01 2014-05-20T13:29:02Z 2014-05-20T13:29:02Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/conferenceObject |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://dx.doi.org/10.1109/PESC.2005.1581673 2005 IEEE 36th Power Electronic Specialists Conference (pesc), Vols 1-3. New York: IEEE, p. 513-518, 2005. 0275-9306 http://hdl.handle.net/11449/9747 10.1109/PESC.2005.1581673 WOS:000237036500081 6427185658143370 |
url |
http://dx.doi.org/10.1109/PESC.2005.1581673 http://hdl.handle.net/11449/9747 |
identifier_str_mv |
2005 IEEE 36th Power Electronic Specialists Conference (pesc), Vols 1-3. New York: IEEE, p. 513-518, 2005. 0275-9306 10.1109/PESC.2005.1581673 WOS:000237036500081 6427185658143370 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
2005 IEEE 36th Power Electronic Specialists Conference (pesc), Vols 1-3 0,100 |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
513-518 |
dc.publisher.none.fl_str_mv |
IEEE |
publisher.none.fl_str_mv |
IEEE |
dc.source.none.fl_str_mv |
Web of Science reponame:Repositório Institucional da UNESP instname:Universidade Estadual Paulista (UNESP) instacron:UNESP |
instname_str |
Universidade Estadual Paulista (UNESP) |
instacron_str |
UNESP |
institution |
UNESP |
reponame_str |
Repositório Institucional da UNESP |
collection |
Repositório Institucional da UNESP |
repository.name.fl_str_mv |
Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP) |
repository.mail.fl_str_mv |
|
_version_ |
1799965623658217472 |