Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process
Autor(a) principal: | |
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Data de Publicação: | 2019 |
Tipo de documento: | Dissertação |
Título da fonte: | Portal de Dados Abertos da CAPES |
Texto Completo: | https://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=7631460 |
id |
BRCRIS_0986b8592a03fc57a116f466b4841254 |
---|---|
network_acronym_str |
CAPES |
network_name_str |
Portal de Dados Abertos da CAPES |
dc.title.pt-BR.fl_str_mv |
Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process |
title |
Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process |
spellingShingle |
Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process Latch Optimization tempo de atraso Estêvão Fernandes de Lima Carvalho |
title_short |
Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process |
title_full |
Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process |
title_fullStr |
Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process |
title_full_unstemmed |
Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process |
title_sort |
Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process |
topic |
Latch Optimization tempo de atraso |
publishDate |
2019 |
format |
masterThesis |
url |
https://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=7631460 |
author_role |
author |
author |
Estêvão Fernandes de Lima Carvalho |
author_facet |
Estêvão Fernandes de Lima Carvalho |
dc.contributor.authorLattes.fl_str_mv |
http://lattes.cnpq.br/5210379823975247 |
dc.contributor.advisor1.fl_str_mv |
ANTONIO PETRAGLIA |
dc.contributor.advisor1Lattes.fl_str_mv |
http://lattes.cnpq.br/9492725982095751 |
dc.publisher.none.fl_str_mv |
UNIVERSIDADE FEDERAL DO RIO DE JANEIRO |
publisher.none.fl_str_mv |
UNIVERSIDADE FEDERAL DO RIO DE JANEIRO |
instname_str |
UNIVERSIDADE FEDERAL DO RIO DE JANEIRO |
dc.publisher.program.fl_str_mv |
ENGENHARIA ELÉTRICA |
dc.description.course.none.fl_txt_mv |
ENGENHARIA ELÉTRICA |
reponame_str |
Portal de Dados Abertos da CAPES |
collection |
Portal de Dados Abertos da CAPES |
spelling |
CAPESPortal de Dados Abertos da CAPESAnalysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS ProcessAnalysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS ProcessAnalysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS ProcessAnalysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS ProcessAnalysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS ProcessAnalysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS ProcessAnalysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS ProcessLatch Optimization2019masterThesishttps://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=7631460authorEstêvão Fernandes de Lima Carvalhohttp://lattes.cnpq.br/5210379823975247ANTONIO PETRAGLIAhttp://lattes.cnpq.br/9492725982095751UNIVERSIDADE FEDERAL DO RIO DE JANEIROUNIVERSIDADE FEDERAL DO RIO DE JANEIROUNIVERSIDADE FEDERAL DO RIO DE JANEIROENGENHARIA ELÉTRICAENGENHARIA ELÉTRICAPortal de Dados Abertos da CAPESPortal de Dados Abertos da CAPES |
identifier_str_mv |
Carvalho, Estêvão Fernandes de Lima. Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process. 2019. Tese. |
dc.identifier.citation.fl_str_mv |
Carvalho, Estêvão Fernandes de Lima. Analysis and Design of 7T Sense Amplifiers in 28 nm FD-SOI CMOS Process. 2019. Tese. |
_version_ |
1741889215968313344 |