A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture

Detalhes bibliográficos
Autor(a) principal: ESTEVAN LINCK LARA
Data de Publicação: 2020
Tipo de documento: Dissertação
Título da fonte: Portal de Dados Abertos da CAPES
Texto Completo: https://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=8374583
id BRCRIS_5d4482453d85d3c0c2af0fe7658e5e76
network_acronym_str CAPES
network_name_str Portal de Dados Abertos da CAPES
dc.title.pt-BR.fl_str_mv A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
title A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
spellingShingle A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
Deadline violation
Violação de Deadline
ESTEVAN LINCK LARA
title_short A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
title_full A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
title_fullStr A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
title_full_unstemmed A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
title_sort A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture
topic Deadline violation
Violação de Deadline
publishDate 2020
format masterThesis
url https://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=8374583
author_role author
author ESTEVAN LINCK LARA
author_facet ESTEVAN LINCK LARA
dc.contributor.authorLattes.fl_str_mv http://lattes.cnpq.br/2428697668206354
dc.contributor.advisor1.fl_str_mv Fabian Vargas
dc.contributor.advisor1Lattes.fl_str_mv http://lattes.cnpq.br/9050311050537919
dc.contributor.advisor1orcid.por.fl_str_mv https://orcid.org/0000000238716464
dc.publisher.none.fl_str_mv PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO GRANDE DO SUL
publisher.none.fl_str_mv PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO GRANDE DO SUL
instname_str PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO GRANDE DO SUL
dc.publisher.program.fl_str_mv ENGENHARIA ELÉTRICA
dc.description.course.none.fl_txt_mv ENGENHARIA ELÉTRICA
reponame_str Portal de Dados Abertos da CAPES
collection Portal de Dados Abertos da CAPES
spelling CAPESPortal de Dados Abertos da CAPESA Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore ArchitectureA Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore ArchitectureA Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore ArchitectureA Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore ArchitectureA Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore ArchitectureA Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore ArchitectureA Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore ArchitectureDeadline violation2020masterThesishttps://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=8374583authorESTEVAN LINCK LARAhttp://lattes.cnpq.br/2428697668206354Fabian Vargashttp://lattes.cnpq.br/9050311050537919https://orcid.org/0000000238716464PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO GRANDE DO SULPONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO GRANDE DO SULPONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO GRANDE DO SULENGENHARIA ELÉTRICAENGENHARIA ELÉTRICAPortal de Dados Abertos da CAPESPortal de Dados Abertos da CAPES
identifier_str_mv LARA, ESTEVAN LINCK. A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture. 2020. Tese.
dc.identifier.citation.fl_str_mv LARA, ESTEVAN LINCK. A Hardware-based Approach to Guarantee Critical Task Schedulability in TDMA Bus Access of Multicore Architecture. 2020. Tese.
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