Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach

Detalhes bibliográficos
Data de Publicação: 2020
Tipo de documento: Tese
Título da fonte: Portal de Dados Abertos da CAPES
Texto Completo: https://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=9348587
id BRCRIS_5e8aadf2affb3647d45b48df808badc3
network_acronym_str CAPES
network_name_str Portal de Dados Abertos da CAPES
dc.title.pt-BR.fl_str_mv Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
title Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
spellingShingle Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
compilador
compiler
title_short Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
title_full Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
title_fullStr Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
title_full_unstemmed Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
title_sort Improving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approach
topic compilador
compiler
publishDate 2020
format doctoralThesis
url https://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=9348587
author_role author
dc.publisher.none.fl_str_mv UNIVERSIDADE ESTADUAL DE CAMPINAS
publisher.none.fl_str_mv UNIVERSIDADE ESTADUAL DE CAMPINAS
instname_str UNIVERSIDADE ESTADUAL DE CAMPINAS
dc.publisher.program.fl_str_mv CIÊNCIA DA COMPUTAÇÃO
dc.description.course.none.fl_txt_mv CIÊNCIA DA COMPUTAÇÃO
reponame_str Portal de Dados Abertos da CAPES
collection Portal de Dados Abertos da CAPES
spelling CAPESPortal de Dados Abertos da CAPESImproving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination ApproachImproving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination ApproachImproving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination ApproachImproving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination ApproachImproving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination ApproachImproving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination ApproachImproving Hardware/Software Transactional Memory Codesign: A Phased-based and Over-Instrumentation Elimination Approachcompilador2020doctoralThesishttps://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=9348587authorUNIVERSIDADE ESTADUAL DE CAMPINASUNIVERSIDADE ESTADUAL DE CAMPINASUNIVERSIDADE ESTADUAL DE CAMPINASCIÊNCIA DA COMPUTAÇÃOCIÊNCIA DA COMPUTAÇÃOPortal de Dados Abertos da CAPESPortal de Dados Abertos da CAPES
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