The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification

Detalhes bibliográficos
Data de Publicação: 2009
Tipo de documento: Dissertação
Título da fonte: Portal de Dados Abertos da CAPES
id BRCRIS_9783d9376c2055f7a98243c5e097f9c8
network_acronym_str CAPES
network_name_str Portal de Dados Abertos da CAPES
dc.title.pt-BR.fl_str_mv The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
title The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
spellingShingle The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
title_short The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
title_full The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
title_fullStr The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
title_full_unstemmed The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
title_sort The Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification
publishDate 2009
format masterThesis
author_role author
dc.publisher.none.fl_str_mv UNIVERSIDADE FEDERAL DE PERNAMBUCO
publisher.none.fl_str_mv UNIVERSIDADE FEDERAL DE PERNAMBUCO
instname_str UNIVERSIDADE FEDERAL DE PERNAMBUCO
reponame_str Portal de Dados Abertos da CAPES
collection Portal de Dados Abertos da CAPES
spelling CAPESPortal de Dados Abertos da CAPESThe Development of a Hadware Abstraction Layer Generator for System-onchip Functional VerificationThe Development of a Hadware Abstraction Layer Generator for System-onchip Functional VerificationThe Development of a Hadware Abstraction Layer Generator for System-onchip Functional VerificationThe Development of a Hadware Abstraction Layer Generator for System-onchip Functional VerificationThe Development of a Hadware Abstraction Layer Generator for System-onchip Functional VerificationThe Development of a Hadware Abstraction Layer Generator for System-onchip Functional VerificationThe Development of a Hadware Abstraction Layer Generator for System-onchip Functional Verification2009masterThesisauthorUNIVERSIDADE FEDERAL DE PERNAMBUCOUNIVERSIDADE FEDERAL DE PERNAMBUCOUNIVERSIDADE FEDERAL DE PERNAMBUCOPortal de Dados Abertos da CAPESPortal de Dados Abertos da CAPES
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