A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits

Detalhes bibliográficos
Autor(a) principal: BERNARDO GUERRA PEREIRA CUNHA
Data de Publicação: 2020
Tipo de documento: Dissertação
Título da fonte: Portal de Dados Abertos da CAPES
Texto Completo: <a href="https://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=9960066"/>
id BRCRIS_f028fc0d7e40f3be6b5d23319429283c
network_acronym_str CAPES
network_name_str Portal de Dados Abertos da CAPES
dc.title.pt-BR.fl_str_mv A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
title A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
spellingShingle A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
escalabilidade
Scalability
BERNARDO GUERRA PEREIRA CUNHA
title_short A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
title_full A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
title_fullStr A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
title_full_unstemmed A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
title_sort A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits
topic escalabilidade
Scalability
publishDate 2020
format masterThesis
url <a href="https://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=9960066"/>
author_role author
author BERNARDO GUERRA PEREIRA CUNHA
author_facet BERNARDO GUERRA PEREIRA CUNHA
dc.contributor.authorLattes.fl_str_mv http://lattes.cnpq.br/3340497692430509
dc.contributor.advisor1.fl_str_mv CARLOS AUGUSTO PAIVA DA SILVA MARTINS
FLAVIA MAGALHAES FREITAS FERREIRA
dc.contributor.advisor1Lattes.fl_str_mv http://lattes.cnpq.br/6790342959640905
http://lattes.cnpq.br/3526961877010261
dc.contributor.advisor1orcid.por.fl_str_mv https://orcid.org/0000000329701647
https://orcid.org/0000-0002-9856-2436
dc.publisher.none.fl_str_mv PONTIFÍCIA UNIVERSIDADE CATÓLICA DE MINAS GERAIS
publisher.none.fl_str_mv PONTIFÍCIA UNIVERSIDADE CATÓLICA DE MINAS GERAIS
instname_str PONTIFÍCIA UNIVERSIDADE CATÓLICA DE MINAS GERAIS
dc.publisher.program.fl_str_mv ENGENHARIA ELÉTRICA
dc.description.course.none.fl_txt_mv ENGENHARIA ELÉTRICA
reponame_str Portal de Dados Abertos da CAPES
collection Portal de Dados Abertos da CAPES
spelling CAPESPortal de Dados Abertos da CAPESA Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational CircuitsA Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational CircuitsA Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational CircuitsA Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational CircuitsA Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational CircuitsA Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational CircuitsA Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuitsescalabilidade2020masterThesis<a href="https://sucupira.capes.gov.br/sucupira/public/consultas/coleta/trabalhoConclusao/viewTrabalhoConclusao.jsf?popup=true&id_trabalho=9960066"/>authorBERNARDO GUERRA PEREIRA CUNHAhttp://lattes.cnpq.br/3340497692430509CARLOS AUGUSTO PAIVA DA SILVA MARTINShttp://lattes.cnpq.br/6790342959640905https://orcid.org/0000000329701647PONTIFÍCIA UNIVERSIDADE CATÓLICA DE MINAS GERAISPONTIFÍCIA UNIVERSIDADE CATÓLICA DE MINAS GERAISPONTIFÍCIA UNIVERSIDADE CATÓLICA DE MINAS GERAISENGENHARIA ELÉTRICAENGENHARIA ELÉTRICAPortal de Dados Abertos da CAPESPortal de Dados Abertos da CAPES
identifier_str_mv CUNHA, BERNARDO GUERRA PEREIRA. A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits. 2020. Tese.
dc.identifier.citation.fl_str_mv CUNHA, BERNARDO GUERRA PEREIRA. A Complete FPGA Evolvable Hardware Architecture Based on Virtual Reconfiguration: Evolving Combinational Circuits. 2020. Tese.
_version_ 1741887890586075136

Registros relacionados