Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment
Autor(a) principal: | |
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Data de Publicação: | 2017 |
Outros Autores: | , , , |
Tipo de documento: | Artigo |
Título da fonte: | Biblioteca Digital de Teses e Dissertações da FEI |
Texto Completo: | https://repositorio.fei.edu.br/handle/FEI/1313 |
Resumo: | 17 |
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Biblioteca Digital de Teses e Dissertações da FEI |
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GALEMBECK, EGON H.S.RENAUX, CHRISTIANFLANDRE, DenisFINCO, SAULOGIMENEZ, SALVADOR P.2019-08-19T23:45:29Z2019-08-19T23:45:29Z2017GALEMBECK, EGON H.S.; RENAUX, CHRISTIAN; FLANDRE, Denis; FINCO, SAULO; GIMENEZ, SALVADOR P.. Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, v. 17, n. 1, p. 1-1, 2017.1530-4388https://repositorio.fei.edu.br/handle/FEI/131310.1109/tdmr.2017.2652729IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITYBoosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environmentinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/article17111info:eu-repo/semantics/openAccessreponame:Biblioteca Digital de Teses e Dissertações da FEIinstname:Centro Universitário da Fundação Educacional Inaciana (FEI)instacron:FEIFEI/13132019-08-19 20:45:29.558Biblioteca Digital de Teses e Dissertaçõeshttp://sofia.fei.edu.br/pergamum/biblioteca/PRI |
dc.title.pt_BR.fl_str_mv |
Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment |
title |
Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment |
spellingShingle |
Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment GALEMBECK, EGON H.S. |
title_short |
Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment |
title_full |
Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment |
title_fullStr |
Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment |
title_full_unstemmed |
Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment |
title_sort |
Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment |
author |
GALEMBECK, EGON H.S. |
author_facet |
GALEMBECK, EGON H.S. RENAUX, CHRISTIAN FLANDRE, Denis FINCO, SAULO GIMENEZ, SALVADOR P. |
author_role |
author |
author2 |
RENAUX, CHRISTIAN FLANDRE, Denis FINCO, SAULO GIMENEZ, SALVADOR P. |
author2_role |
author author author author |
dc.contributor.author.fl_str_mv |
GALEMBECK, EGON H.S. RENAUX, CHRISTIAN FLANDRE, Denis FINCO, SAULO GIMENEZ, SALVADOR P. |
description |
17 |
publishDate |
2017 |
dc.date.issued.fl_str_mv |
2017 |
dc.date.accessioned.fl_str_mv |
2019-08-19T23:45:29Z |
dc.date.available.fl_str_mv |
2019-08-19T23:45:29Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article |
format |
article |
status_str |
publishedVersion |
dc.identifier.citation.fl_str_mv |
GALEMBECK, EGON H.S.; RENAUX, CHRISTIAN; FLANDRE, Denis; FINCO, SAULO; GIMENEZ, SALVADOR P.. Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, v. 17, n. 1, p. 1-1, 2017. |
dc.identifier.uri.fl_str_mv |
https://repositorio.fei.edu.br/handle/FEI/1313 |
dc.identifier.issn.none.fl_str_mv |
1530-4388 |
dc.identifier.doi.none.fl_str_mv |
10.1109/tdmr.2017.2652729 |
identifier_str_mv |
GALEMBECK, EGON H.S.; RENAUX, CHRISTIAN; FLANDRE, Denis; FINCO, SAULO; GIMENEZ, SALVADOR P.. Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, v. 17, n. 1, p. 1-1, 2017. 1530-4388 10.1109/tdmr.2017.2652729 |
url |
https://repositorio.fei.edu.br/handle/FEI/1313 |
dc.relation.ispartof.none.fl_str_mv |
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.source.none.fl_str_mv |
reponame:Biblioteca Digital de Teses e Dissertações da FEI instname:Centro Universitário da Fundação Educacional Inaciana (FEI) instacron:FEI |
instname_str |
Centro Universitário da Fundação Educacional Inaciana (FEI) |
instacron_str |
FEI |
institution |
FEI |
reponame_str |
Biblioteca Digital de Teses e Dissertações da FEI |
collection |
Biblioteca Digital de Teses e Dissertações da FEI |
repository.name.fl_str_mv |
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repository.mail.fl_str_mv |
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1734750993822777344 |