Adequação de modelos arquiteturais para aplicações tempo-real em sistemas many-core

• Autor(a) principal: Madalozzo, Guilherme Afonso
• Data de Publicação: 2017
• Tipo de documento: Tese
• Idioma: por
• Título da fonte: Biblioteca Digital de Teses e Dissertações da PUC_RS
• Texto Completo: http://tede2.pucrs.br/tede2/handle/tede/7360
• topic: Sistemas Many-core; Modelagem de Sistemas Many-core; Aplicações Tempo-real; Escalonamento; Mapeamento; CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO

The evolution of integrated circuit manufacturing process allowed the SoC (System-on- Chip) design in the 90’s, and currently the design of multiprocessors systems on chip – MPSoCs (Multiprocessor System-on-Chip). Embedded systems use these devices, due to the offered computational power. The MPSoC design is a challenging task. Specify the MPSoC characteristics, define the components that compose the system and analyze their features are decisions that may change over the product development. Traditional design methods do not favor the design space exploration, leading to expensive products due to required hardware simulation at the gate level, which is only available at the end of the design flow. To solve the design problems of traditional methods, Platform Based Design (PBD) techniques is a design choice. The basis of PBD is a virtual platform model, enabling fast simulations, software debugging and reusability of hardware components. This Thesis comprises the study and development in two research axes: (1) modeling of virtual platforms; (2) analytical methods for software heuristics targeting embedded real-time applications. Virtual platforms are modeled by using ADLs (Architecture Description Languages). This work presents the modeling of several virtual platforms, using different abstraction levels (from RTL to untimed models) and memory architectures (shared and distributed). Based on the evaluations performed in each architecture, the HeMPS platform was adapted to execute real-time applications. The results showed that using the proposed scheduling mechanism and RTA mapping, the results meet the constraints defined by the applications. Comparing platforms with mapping and schedule heuristics on literature, the proposed platform met 100% of the restrictions resulting from the test cases.