Logic-based schedulability analysis for compositional hard real-time embedded systems
Autor(a) principal: | |
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Data de Publicação: | 2015 |
Outros Autores: | , , |
Tipo de documento: | Artigo |
Idioma: | eng |
Título da fonte: | Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
Texto Completo: | http://hdl.handle.net/1822/35229 |
Resumo: | This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in SIGBED Review, VOL.12, ISS.1, http://doi.acm.org/10.1145/2752801.2752808 |
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Logic-based schedulability analysis for compositional hard real-time embedded systemsSchedulability AnalysisReal-time SystemsTimed temporal logicCiências Naturais::Ciências da Computação e da InformaçãoEngenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e InformáticaThis is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in SIGBED Review, VOL.12, ISS.1, http://doi.acm.org/10.1145/2752801.2752808Over the past decades several approaches for schedu- lability analysis have been proposed for both uniprocessor and multi-processor real-time systems. Although different techniques are employed, very little has been put forward in using formal specifications, with the consequent possibility for misinterpretations or ambiguities in the problem statement. Using a logic based approach to schedulability analysis in the design of hard real-time systems eases the synthesis of correct-by- construction procedures for both static and dynamic verification processes. In this paper we propose a novel approach to schedulability analysis based on a timed temporal logic with time durations. Our approach subsumes classical methods for uniprocessor scheduling analysis over compositional resource models by providing the developer with counter-examples, and by ruling out schedules that cause unsafe violations on the system. We also provide an example showing the effectiveness of our proposal.This work was partially supported by National Funds through FCT (Portuguese Foundation for Science and Technology) and by ERDF (European Regional Development Fund) through COMPETE (Operational Programme ’Thematic Fac- tors of Competitiveness’), within projects Ref. FCOMP-01- 0124-FEDER-022701 (CISTER), FCOMP-01-0124-FEDER- 015006 (VIPCORE) and FCOMP-01-0124-FEDER-020486 (AVIACC).Association for Computing Machinery (ACM)Universidade do MinhoPedro, André MatosPereira, DavidPinho, Luís MiguelPinto, Jorge Sousa20152015-01-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/1822/35229engA. M. Pedro, D. Pereira, L. M. Pinho, and J. S. Pinto. Logic-based schedulability analysis for compositional hard real-time embedded systems. In M. Behnam and G. Buttazzo, editors, Proceedings of the 6th International Workshop on Compositional Theory and Technology for Real-Time Embedded Systems (CRTS 2013). SIGBED Rev., 12(1):56–64. New York, NY, USA, 2015. ACM.1551-368810.1145/2752801.2752808info:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-07-21T12:25:57Zoai:repositorium.sdum.uminho.pt:1822/35229Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T19:20:16.580183Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse |
dc.title.none.fl_str_mv |
Logic-based schedulability analysis for compositional hard real-time embedded systems |
title |
Logic-based schedulability analysis for compositional hard real-time embedded systems |
spellingShingle |
Logic-based schedulability analysis for compositional hard real-time embedded systems Pedro, André Matos Schedulability Analysis Real-time Systems Timed temporal logic Ciências Naturais::Ciências da Computação e da Informação Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática |
title_short |
Logic-based schedulability analysis for compositional hard real-time embedded systems |
title_full |
Logic-based schedulability analysis for compositional hard real-time embedded systems |
title_fullStr |
Logic-based schedulability analysis for compositional hard real-time embedded systems |
title_full_unstemmed |
Logic-based schedulability analysis for compositional hard real-time embedded systems |
title_sort |
Logic-based schedulability analysis for compositional hard real-time embedded systems |
author |
Pedro, André Matos |
author_facet |
Pedro, André Matos Pereira, David Pinho, Luís Miguel Pinto, Jorge Sousa |
author_role |
author |
author2 |
Pereira, David Pinho, Luís Miguel Pinto, Jorge Sousa |
author2_role |
author author author |
dc.contributor.none.fl_str_mv |
Universidade do Minho |
dc.contributor.author.fl_str_mv |
Pedro, André Matos Pereira, David Pinho, Luís Miguel Pinto, Jorge Sousa |
dc.subject.por.fl_str_mv |
Schedulability Analysis Real-time Systems Timed temporal logic Ciências Naturais::Ciências da Computação e da Informação Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática |
topic |
Schedulability Analysis Real-time Systems Timed temporal logic Ciências Naturais::Ciências da Computação e da Informação Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática |
description |
This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in SIGBED Review, VOL.12, ISS.1, http://doi.acm.org/10.1145/2752801.2752808 |
publishDate |
2015 |
dc.date.none.fl_str_mv |
2015 2015-01-01T00:00:00Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article |
format |
article |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://hdl.handle.net/1822/35229 |
url |
http://hdl.handle.net/1822/35229 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
A. M. Pedro, D. Pereira, L. M. Pinho, and J. S. Pinto. Logic-based schedulability analysis for compositional hard real-time embedded systems. In M. Behnam and G. Buttazzo, editors, Proceedings of the 6th International Workshop on Compositional Theory and Technology for Real-Time Embedded Systems (CRTS 2013). SIGBED Rev., 12(1):56–64. New York, NY, USA, 2015. ACM. 1551-3688 10.1145/2752801.2752808 |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
application/pdf |
dc.publisher.none.fl_str_mv |
Association for Computing Machinery (ACM) |
publisher.none.fl_str_mv |
Association for Computing Machinery (ACM) |
dc.source.none.fl_str_mv |
reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação instacron:RCAAP |
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Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
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RCAAP |
institution |
RCAAP |
reponame_str |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
collection |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
repository.name.fl_str_mv |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
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1799132664931811328 |