VHDL generation from hierarchical petri net specifications of parallel controllers

Detalhes bibliográficos
Autor(a) principal: Fernandes, João M.
Data de Publicação: 1997
Outros Autores: Adamski, Marian, Proença, Alberto José
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: http://hdl.handle.net/1822/5976
Resumo: Parallel controllers can be best specified using a description with a formal support to validate structural and dynamic properties. Petri Nets (PN) can provide an adequate means to model and to animate parallel systems based on the control and data path approach, in a hierarchically structured way. A set of tools was developed to allow formal validation of parallel controllers, based on hierarchical PN-based specifications and to automatically generate RT-level VHDL code. An example of a VLSI chip design, the transputer link adaptor, shows the capabilities of this methodology and associated tools.
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spelling VHDL generation from hierarchical petri net specifications of parallel controllersVHDL generationParallel controllersPetri netsScience & TechnologyParallel controllers can be best specified using a description with a formal support to validate structural and dynamic properties. Petri Nets (PN) can provide an adequate means to model and to animate parallel systems based on the control and data path approach, in a hierarchically structured way. A set of tools was developed to allow formal validation of parallel controllers, based on hierarchical PN-based specifications and to automatically generate RT-level VHDL code. An example of a VLSI chip design, the transputer link adaptor, shows the capabilities of this methodology and associated tools.(undefined)(undefined)Institution of Electrical Engineers (IEE)Universidade do MinhoFernandes, João M.Adamski, MarianProença, Alberto José1997-031997-03-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/1822/5976eng"IEE Proceedings : Computers and Digital Techniques". ISSN 1350-2387. 144:2 (Mar. 1997) 127-137.1350-238710.1049/ip-cdt:19970845info:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-07-21T12:14:47Zoai:repositorium.sdum.uminho.pt:1822/5976Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T19:07:07.688847Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv VHDL generation from hierarchical petri net specifications of parallel controllers
title VHDL generation from hierarchical petri net specifications of parallel controllers
spellingShingle VHDL generation from hierarchical petri net specifications of parallel controllers
Fernandes, João M.
VHDL generation
Parallel controllers
Petri nets
Science & Technology
title_short VHDL generation from hierarchical petri net specifications of parallel controllers
title_full VHDL generation from hierarchical petri net specifications of parallel controllers
title_fullStr VHDL generation from hierarchical petri net specifications of parallel controllers
title_full_unstemmed VHDL generation from hierarchical petri net specifications of parallel controllers
title_sort VHDL generation from hierarchical petri net specifications of parallel controllers
author Fernandes, João M.
author_facet Fernandes, João M.
Adamski, Marian
Proença, Alberto José
author_role author
author2 Adamski, Marian
Proença, Alberto José
author2_role author
author
dc.contributor.none.fl_str_mv Universidade do Minho
dc.contributor.author.fl_str_mv Fernandes, João M.
Adamski, Marian
Proença, Alberto José
dc.subject.por.fl_str_mv VHDL generation
Parallel controllers
Petri nets
Science & Technology
topic VHDL generation
Parallel controllers
Petri nets
Science & Technology
description Parallel controllers can be best specified using a description with a formal support to validate structural and dynamic properties. Petri Nets (PN) can provide an adequate means to model and to animate parallel systems based on the control and data path approach, in a hierarchically structured way. A set of tools was developed to allow formal validation of parallel controllers, based on hierarchical PN-based specifications and to automatically generate RT-level VHDL code. An example of a VLSI chip design, the transputer link adaptor, shows the capabilities of this methodology and associated tools.
publishDate 1997
dc.date.none.fl_str_mv 1997-03
1997-03-01T00:00:00Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
format article
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://hdl.handle.net/1822/5976
url http://hdl.handle.net/1822/5976
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv "IEE Proceedings : Computers and Digital Techniques". ISSN 1350-2387. 144:2 (Mar. 1997) 127-137.
1350-2387
10.1049/ip-cdt:19970845
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Institution of Electrical Engineers (IEE)
publisher.none.fl_str_mv Institution of Electrical Engineers (IEE)
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
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repository.name.fl_str_mv Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
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