Comparing Admission Control Architectures for Real-Time Ethernet

Detalhes bibliográficos
Autor(a) principal: Alvarez, Ines
Data de Publicação: 2020
Outros Autores: Moutinho, Luis, Pedreiras, Paulo, Bujosa, Daniel, Proenza, Julian, Almeida, Luis
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: http://hdl.handle.net/10400.22/16134
Resumo: Industry 4.0 and Autonomous Driving are emerging resource-intensive distributed application domains that deal with open and evolving environments. These systems are subject to stringent resource, timing, and other non-functional constraints, as well as frequent reconfiguration. Thus, real-time behavior must not preclude operational flexibility. This combination is motivating ongoing efforts within the Time Sensitive Networking (TSN) standardization committee to define admission control mechanisms for Ethernet. Existing mechanisms in TSN, like those of AVB, its predecessor, follow a distributed architecture that favors scalability. Conversely, the new mechanisms envisaged for TSN (IEEE 802.1Qcc) follow a (partially) centralized architecture, favoring short reconfiguration latency. This paper shows the first quantitative comparison between distributed and centralized admission control architectures concerning reconfiguration latency. Here, we compare AVB against a dynamic real-time reconfigurable Ethernet technology with centralized management, namely HaRTES. Our experiments show a significantly lower latency using the centralized architecture. We also observe the dependence of the distributed architecture in the end nodes' performance and the benefit of having a protected channel for the admission control transactions.
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spelling Comparing Admission Control Architectures for Real-Time EthernetEthernetTSNAVBHaRTESreal-time communicationdynamic reconfigurationadmission control protocolIndustry 4.0 and Autonomous Driving are emerging resource-intensive distributed application domains that deal with open and evolving environments. These systems are subject to stringent resource, timing, and other non-functional constraints, as well as frequent reconfiguration. Thus, real-time behavior must not preclude operational flexibility. This combination is motivating ongoing efforts within the Time Sensitive Networking (TSN) standardization committee to define admission control mechanisms for Ethernet. Existing mechanisms in TSN, like those of AVB, its predecessor, follow a distributed architecture that favors scalability. Conversely, the new mechanisms envisaged for TSN (IEEE 802.1Qcc) follow a (partially) centralized architecture, favoring short reconfiguration latency. This paper shows the first quantitative comparison between distributed and centralized admission control architectures concerning reconfiguration latency. Here, we compare AVB against a dynamic real-time reconfigurable Ethernet technology with centralized management, namely HaRTES. Our experiments show a significantly lower latency using the centralized architecture. We also observe the dependence of the distributed architecture in the end nodes' performance and the benefit of having a protected channel for the admission control transactions.This work was supported in part by the Spanish Agencia Estatal de Investigación (AEI), in part by the Fondo Europeo de Desarrollo Regional (FEDER) [AEI/FEDER, Unión Europea (UE)] under Grant TEC2015-70313-R, in part by the European Regional Development Fund (FEDER) through the Operational Programme for Competitivity and the Internationalization of Portugal 2020 Partnership Agreement (PRODUTECH-SIF) under Grant POCI-01-0247-FEDER-024541, and in part by the Research Centre Instituto de Telecomunicações under Grant UID/EEA/50008/2013.Institute of Electrical and Electronics EngineersRepositório Científico do Instituto Politécnico do PortoAlvarez, InesMoutinho, LuisPedreiras, PauloBujosa, DanielProenza, JulianAlmeida, Luis2020-07-28T11:21:46Z20202020-01-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10400.22/16134eng2169-353610.1109/ACCESS.2020.2999817info:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-03-13T13:02:22Zoai:recipp.ipp.pt:10400.22/16134Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T17:35:51.175981Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv Comparing Admission Control Architectures for Real-Time Ethernet
title Comparing Admission Control Architectures for Real-Time Ethernet
spellingShingle Comparing Admission Control Architectures for Real-Time Ethernet
Alvarez, Ines
Ethernet
TSN
AVB
HaRTES
real-time communication
dynamic reconfiguration
admission control protocol
title_short Comparing Admission Control Architectures for Real-Time Ethernet
title_full Comparing Admission Control Architectures for Real-Time Ethernet
title_fullStr Comparing Admission Control Architectures for Real-Time Ethernet
title_full_unstemmed Comparing Admission Control Architectures for Real-Time Ethernet
title_sort Comparing Admission Control Architectures for Real-Time Ethernet
author Alvarez, Ines
author_facet Alvarez, Ines
Moutinho, Luis
Pedreiras, Paulo
Bujosa, Daniel
Proenza, Julian
Almeida, Luis
author_role author
author2 Moutinho, Luis
Pedreiras, Paulo
Bujosa, Daniel
Proenza, Julian
Almeida, Luis
author2_role author
author
author
author
author
dc.contributor.none.fl_str_mv Repositório Científico do Instituto Politécnico do Porto
dc.contributor.author.fl_str_mv Alvarez, Ines
Moutinho, Luis
Pedreiras, Paulo
Bujosa, Daniel
Proenza, Julian
Almeida, Luis
dc.subject.por.fl_str_mv Ethernet
TSN
AVB
HaRTES
real-time communication
dynamic reconfiguration
admission control protocol
topic Ethernet
TSN
AVB
HaRTES
real-time communication
dynamic reconfiguration
admission control protocol
description Industry 4.0 and Autonomous Driving are emerging resource-intensive distributed application domains that deal with open and evolving environments. These systems are subject to stringent resource, timing, and other non-functional constraints, as well as frequent reconfiguration. Thus, real-time behavior must not preclude operational flexibility. This combination is motivating ongoing efforts within the Time Sensitive Networking (TSN) standardization committee to define admission control mechanisms for Ethernet. Existing mechanisms in TSN, like those of AVB, its predecessor, follow a distributed architecture that favors scalability. Conversely, the new mechanisms envisaged for TSN (IEEE 802.1Qcc) follow a (partially) centralized architecture, favoring short reconfiguration latency. This paper shows the first quantitative comparison between distributed and centralized admission control architectures concerning reconfiguration latency. Here, we compare AVB against a dynamic real-time reconfigurable Ethernet technology with centralized management, namely HaRTES. Our experiments show a significantly lower latency using the centralized architecture. We also observe the dependence of the distributed architecture in the end nodes' performance and the benefit of having a protected channel for the admission control transactions.
publishDate 2020
dc.date.none.fl_str_mv 2020-07-28T11:21:46Z
2020
2020-01-01T00:00:00Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
format article
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dc.identifier.uri.fl_str_mv http://hdl.handle.net/10400.22/16134
url http://hdl.handle.net/10400.22/16134
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 2169-3536
10.1109/ACCESS.2020.2999817
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dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
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