Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems

Detalhes bibliográficos
Autor(a) principal: Arora, Jatin
Data de Publicação: 2022
Outros Autores: Rashid, Syed Aftab, Maia, Cláudio, Nelissen, Geoffrey, Tovar, Eduardo
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: http://hdl.handle.net/10400.22/21643
Resumo: Multicore platforms share the hardware resources such as caches, interconnects, and main memory among all the cores. Due to such sharing, tasks running on different cores compete to access these shared resources which increases the execution times of those tasks in a non-deterministic manner. This is problematic for systems that run applications with stringent timing requirements. To address this issue, we propose a holistic analysis to bound the maximum inter-core contention that can be suffered by tasks from tasks running on other cores.
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spelling Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems220907Real Time SystemsMulticore ProcessorsPhased Execution ModelHolistic AnalysisMulticore platforms share the hardware resources such as caches, interconnects, and main memory among all the cores. Due to such sharing, tasks running on different cores compete to access these shared resources which increases the execution times of those tasks in a non-deterministic manner. This is problematic for systems that run applications with stringent timing requirements. To address this issue, we propose a holistic analysis to bound the maximum inter-core contention that can be suffered by tasks from tasks running on other cores.IEEERepositório Científico do Instituto Politécnico do PortoArora, JatinRashid, Syed AftabMaia, CláudioNelissen, GeoffreyTovar, Eduardo2022-12-052035-01-01T00:00:00Z2022-12-05T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10400.22/21643eng10.1109/RTSS55097.2022.00054metadata only accessinfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-03-13T13:17:50Zoai:recipp.ipp.pt:10400.22/21643Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T17:41:41.702988Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems
220907
title Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems
spellingShingle Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems
Arora, Jatin
Real Time Systems
Multicore Processors
Phased Execution Model
Holistic Analysis
title_short Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems
title_full Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems
title_fullStr Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems
title_full_unstemmed Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems
title_sort Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems
author Arora, Jatin
author_facet Arora, Jatin
Rashid, Syed Aftab
Maia, Cláudio
Nelissen, Geoffrey
Tovar, Eduardo
author_role author
author2 Rashid, Syed Aftab
Maia, Cláudio
Nelissen, Geoffrey
Tovar, Eduardo
author2_role author
author
author
author
dc.contributor.none.fl_str_mv Repositório Científico do Instituto Politécnico do Porto
dc.contributor.author.fl_str_mv Arora, Jatin
Rashid, Syed Aftab
Maia, Cláudio
Nelissen, Geoffrey
Tovar, Eduardo
dc.subject.por.fl_str_mv Real Time Systems
Multicore Processors
Phased Execution Model
Holistic Analysis
topic Real Time Systems
Multicore Processors
Phased Execution Model
Holistic Analysis
description Multicore platforms share the hardware resources such as caches, interconnects, and main memory among all the cores. Due to such sharing, tasks running on different cores compete to access these shared resources which increases the execution times of those tasks in a non-deterministic manner. This is problematic for systems that run applications with stringent timing requirements. To address this issue, we propose a holistic analysis to bound the maximum inter-core contention that can be suffered by tasks from tasks running on other cores.
publishDate 2022
dc.date.none.fl_str_mv 2022-12-05
2022-12-05T00:00:00Z
2035-01-01T00:00:00Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
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url http://hdl.handle.net/10400.22/21643
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 10.1109/RTSS55097.2022.00054
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dc.publisher.none.fl_str_mv IEEE
publisher.none.fl_str_mv IEEE
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collection Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
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