An FPGA implementation of OFDM transceiver for LTE applications
Autor(a) principal: | |
---|---|
Data de Publicação: | 2013 |
Outros Autores: | , , , , |
Tipo de documento: | Artigo |
Idioma: | eng |
Título da fonte: | Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
Texto Completo: | http://hdl.handle.net/10773/12534 |
Resumo: | The paper presents a real-time transceiver using an Orthogonal Frequency-Division Multiplexing (OFDM) signaling scheme. The transceiver is implemented on a Field- Programmable Gate Array (FPGA) through Xilinx System Generator for DSP and includes all the blocks needed for the transmission path of OFDM. The transmitter frame can be reconfigured for different pilot and data schemes. In the receiver, time-domain synchronization is achieved thr ough a joint maximum likelihood (ML) symbol arrival-time and carrier frequency offset (CFO) estimator through the redundant information contained in the cyclic prefix (CP). A least-squares channel estimation retrieves the channel state information and a simple zero-forcing scheme has been implemented for channel equalization. Results show that a rough implementation of the signal path can be impleme nted by using only Xilinx System Generator for DSP. |
id |
RCAP_5af02d0d70d8eb6f2d4c904099b29043 |
---|---|
oai_identifier_str |
oai:ria.ua.pt:10773/12534 |
network_acronym_str |
RCAP |
network_name_str |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
repository_id_str |
7160 |
spelling |
An FPGA implementation of OFDM transceiver for LTE applicationsSoftware Defined RadioOFDMFPGATime-domain synchronizationLeast square channel estimationThe paper presents a real-time transceiver using an Orthogonal Frequency-Division Multiplexing (OFDM) signaling scheme. The transceiver is implemented on a Field- Programmable Gate Array (FPGA) through Xilinx System Generator for DSP and includes all the blocks needed for the transmission path of OFDM. The transmitter frame can be reconfigured for different pilot and data schemes. In the receiver, time-domain synchronization is achieved thr ough a joint maximum likelihood (ML) symbol arrival-time and carrier frequency offset (CFO) estimator through the redundant information contained in the cyclic prefix (CP). A least-squares channel estimation retrieves the channel state information and a simple zero-forcing scheme has been implemented for channel equalization. Results show that a rough implementation of the signal path can be impleme nted by using only Xilinx System Generator for DSP.IARIA2014-07-28T14:23:34Z2013-06-01T00:00:00Z2013-06-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10773/12534eng1942-261xPereira, TiagoViolas, ManuelLourenço, JoãoGameiro, AtílioSilva, AdãoRibeiro, Carlosinfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2024-02-22T11:22:51Zoai:ria.ua.pt:10773/12534Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-20T02:48:41.334208Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse |
dc.title.none.fl_str_mv |
An FPGA implementation of OFDM transceiver for LTE applications |
title |
An FPGA implementation of OFDM transceiver for LTE applications |
spellingShingle |
An FPGA implementation of OFDM transceiver for LTE applications Pereira, Tiago Software Defined Radio OFDM FPGA Time-domain synchronization Least square channel estimation |
title_short |
An FPGA implementation of OFDM transceiver for LTE applications |
title_full |
An FPGA implementation of OFDM transceiver for LTE applications |
title_fullStr |
An FPGA implementation of OFDM transceiver for LTE applications |
title_full_unstemmed |
An FPGA implementation of OFDM transceiver for LTE applications |
title_sort |
An FPGA implementation of OFDM transceiver for LTE applications |
author |
Pereira, Tiago |
author_facet |
Pereira, Tiago Violas, Manuel Lourenço, João Gameiro, Atílio Silva, Adão Ribeiro, Carlos |
author_role |
author |
author2 |
Violas, Manuel Lourenço, João Gameiro, Atílio Silva, Adão Ribeiro, Carlos |
author2_role |
author author author author author |
dc.contributor.author.fl_str_mv |
Pereira, Tiago Violas, Manuel Lourenço, João Gameiro, Atílio Silva, Adão Ribeiro, Carlos |
dc.subject.por.fl_str_mv |
Software Defined Radio OFDM FPGA Time-domain synchronization Least square channel estimation |
topic |
Software Defined Radio OFDM FPGA Time-domain synchronization Least square channel estimation |
description |
The paper presents a real-time transceiver using an Orthogonal Frequency-Division Multiplexing (OFDM) signaling scheme. The transceiver is implemented on a Field- Programmable Gate Array (FPGA) through Xilinx System Generator for DSP and includes all the blocks needed for the transmission path of OFDM. The transmitter frame can be reconfigured for different pilot and data schemes. In the receiver, time-domain synchronization is achieved thr ough a joint maximum likelihood (ML) symbol arrival-time and carrier frequency offset (CFO) estimator through the redundant information contained in the cyclic prefix (CP). A least-squares channel estimation retrieves the channel state information and a simple zero-forcing scheme has been implemented for channel equalization. Results show that a rough implementation of the signal path can be impleme nted by using only Xilinx System Generator for DSP. |
publishDate |
2013 |
dc.date.none.fl_str_mv |
2013-06-01T00:00:00Z 2013-06-01 2014-07-28T14:23:34Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article |
format |
article |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://hdl.handle.net/10773/12534 |
url |
http://hdl.handle.net/10773/12534 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
1942-261x |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
application/pdf |
dc.publisher.none.fl_str_mv |
IARIA |
publisher.none.fl_str_mv |
IARIA |
dc.source.none.fl_str_mv |
reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação instacron:RCAAP |
instname_str |
Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
instacron_str |
RCAAP |
institution |
RCAAP |
reponame_str |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
collection |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
repository.name.fl_str_mv |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
repository.mail.fl_str_mv |
|
_version_ |
1799137538036727808 |