Design of a very high frequency 4-bit current steering DAC for a high speed SerDes transmitter driver

• Autor(a) principal: Santo, Rodolfo Anastácio do Espírito
• Data de Publicação: 2022
• Tipo de documento: Dissertação
• Idioma: eng
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: http://hdl.handle.net/10362/152448
• topic: Digital to Analog Converter; Serializer/De-serializer; Complementary Metal Oxide Semiconductor; Metal Oxide Semiconductor; Fin Field-Effect; Differential Non-Linearity; Domínio/Área Científica::Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática

Nowadays, communication between chips is becoming more complex, however the output number of chips has kept mostly unchanged, turning parallel communication harder to implement. To make the jump from parallel to serial communications, a new system is needed to be implemented: Serializer/De-serializer. Along with the increased complexity of the data, also there is a necessity for higher speeds for the data to be transferred. Therefore, we propose to develop a high frequency Digital to Analog Converter which is to be implemented in a trans-mitter circuit for a high speed Serializer/De-serializer system. The proposed project is implemented in 16nm FinFet technology and with the objective to be able to reach 10GHz frequency, 50Ω output impedance and 0.8V output swing. In order to accomplish this objective, the architecture implemented will be a segmented current-steer-ing DAC with 2LSBs and 2MSBs composed of Current Source Array, Biasing Circuit, CML Driver with an output impedance calibrator, Decoder, Retiming and Drivers Circuit and a Current Ref-erence Generator. This implementation does not only have the objective of reaching high frequencies, but also maintain good non-linearity and minimize sensibility to the process and temperature. Due to the calibrator of the CML Driver having a bigger area, this implementation is expected to have higher power consumption then other implementations. These consequences of the de-sign will try to be overcome.