Operating infrastructure for an FPGA and ARM system

Detalhes bibliográficos
Autor(a) principal: Rodrigues, Sandro
Data de Publicação: 2015
Tipo de documento: Dissertação
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: http://hdl.handle.net/10773/15972
Resumo: Advances in FPGA technology and higher processing capabilities requirements have pushed to the emerge of All Programmable Systems-on-Chip, which incorporate a hard designed processing system and a programmable logic that enable the development of specialized computer systems for a wide range of practical applications, including data and signal processing, high performance computing, embedded systems, among many others. To give place to an infrastructure that is capable of using the benefits of such a reconfigurable system, the main goal of the thesis is to implement an infrastructure composed of hardware, software and network resources, that incorporates the necessary services for the operation, management and interface of peripherals, that coompose the basic building blocks for the execution of applications. The project will be developed using a chip from the Zynq-7000 All Programmable Systems-on-Chip family.
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spelling Operating infrastructure for an FPGA and ARM systemEngenharia electrónicaDispositivos lógicos programáveisSistemas embebidosAdvances in FPGA technology and higher processing capabilities requirements have pushed to the emerge of All Programmable Systems-on-Chip, which incorporate a hard designed processing system and a programmable logic that enable the development of specialized computer systems for a wide range of practical applications, including data and signal processing, high performance computing, embedded systems, among many others. To give place to an infrastructure that is capable of using the benefits of such a reconfigurable system, the main goal of the thesis is to implement an infrastructure composed of hardware, software and network resources, that incorporates the necessary services for the operation, management and interface of peripherals, that coompose the basic building blocks for the execution of applications. The project will be developed using a chip from the Zynq-7000 All Programmable Systems-on-Chip family.Devido aos avanços na tecnologia FPGA e à crescente necessidade de maior capacidade de processamento, surgiram sistemas programáveis que incorporam um sistema de processamento e uma componente de lógica programável. Assim, possibilitando o desenvolvimento de sistemas computacionais especializados para uma ampla gama de aplicações práticas, incluindo processamento de dados e sinal, computação de alto desempenho, sistemas embutidos, entre muitos outros. Para dar lugar a uma infraestrutura capaz de usar os benefícios de um sistema tão reconfigurável, os principais objetivos desta tese são implementar uma infraestrutura composta por hardware, software e recursos de rede, que incorpora serviços para operar e gerir a interface dos periféricos, constituido por blocos de construção básicos necessários para a execução de aplicações. O projeto será desenvolvido utilizando um chip da família Zynq-7000 do fabricante Xilinx.Universidade de Aveiro2016-07-22T13:36:10Z2015-01-01T00:00:00Z2015info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/masterThesisapplication/pdfhttp://hdl.handle.net/10773/15972engRodrigues, Sandroinfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2024-05-06T03:57:37Zoai:ria.ua.pt:10773/15972Portal AgregadorONGhttps://www.rcaap.pt/oai/openairemluisa.alvim@gmail.comopendoar:71602024-05-06T03:57:37Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv Operating infrastructure for an FPGA and ARM system
title Operating infrastructure for an FPGA and ARM system
spellingShingle Operating infrastructure for an FPGA and ARM system
Rodrigues, Sandro
Engenharia electrónica
Dispositivos lógicos programáveis
Sistemas embebidos
title_short Operating infrastructure for an FPGA and ARM system
title_full Operating infrastructure for an FPGA and ARM system
title_fullStr Operating infrastructure for an FPGA and ARM system
title_full_unstemmed Operating infrastructure for an FPGA and ARM system
title_sort Operating infrastructure for an FPGA and ARM system
author Rodrigues, Sandro
author_facet Rodrigues, Sandro
author_role author
dc.contributor.author.fl_str_mv Rodrigues, Sandro
dc.subject.por.fl_str_mv Engenharia electrónica
Dispositivos lógicos programáveis
Sistemas embebidos
topic Engenharia electrónica
Dispositivos lógicos programáveis
Sistemas embebidos
description Advances in FPGA technology and higher processing capabilities requirements have pushed to the emerge of All Programmable Systems-on-Chip, which incorporate a hard designed processing system and a programmable logic that enable the development of specialized computer systems for a wide range of practical applications, including data and signal processing, high performance computing, embedded systems, among many others. To give place to an infrastructure that is capable of using the benefits of such a reconfigurable system, the main goal of the thesis is to implement an infrastructure composed of hardware, software and network resources, that incorporates the necessary services for the operation, management and interface of peripherals, that coompose the basic building blocks for the execution of applications. The project will be developed using a chip from the Zynq-7000 All Programmable Systems-on-Chip family.
publishDate 2015
dc.date.none.fl_str_mv 2015-01-01T00:00:00Z
2015
2016-07-22T13:36:10Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/masterThesis
format masterThesis
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://hdl.handle.net/10773/15972
url http://hdl.handle.net/10773/15972
dc.language.iso.fl_str_mv eng
language eng
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Universidade de Aveiro
publisher.none.fl_str_mv Universidade de Aveiro
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
instacron:RCAAP
instname_str Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
instacron_str RCAAP
institution RCAAP
reponame_str Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
collection Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
repository.name.fl_str_mv Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
repository.mail.fl_str_mv mluisa.alvim@gmail.com
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