A Methodology to Design FPGA-based PID Controllers

Detalhes bibliográficos
Autor(a) principal: Lima, João
Data de Publicação: 2006
Outros Autores: Menotti, Ricardo, Cardoso, João M. P., Marques, Eduardo
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: http://hdl.handle.net/10400.1/1153
Resumo: This paper presents a methodology to implement PID (Proportional, Integral, Derivative) controllers in FPGAs (Field-Programmable Gate Arrays) using fixed-point numerical representation. The Matlab/Simulink environment is used for modeling, simulation and evaluation the performance provided by different fixed-point representations using a given control process. A static bit-width analyzer is used to give a specialized fixed-point representation for each operand/operator in the controller system. After bit-width analysis, a VHDL represen-tation of the system is generated. Results show that the proposed methodology leads to shorten design cycles achieving important resource savings by employing specialized fixed-point repre-sentations.
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spelling A Methodology to Design FPGA-based PID ControllersPID (ProportionalFPGAs (Field-Programmable Gate Arrays)Bit-width analyzerDerivative) controllersIntegralThis paper presents a methodology to implement PID (Proportional, Integral, Derivative) controllers in FPGAs (Field-Programmable Gate Arrays) using fixed-point numerical representation. The Matlab/Simulink environment is used for modeling, simulation and evaluation the performance provided by different fixed-point representations using a given control process. A static bit-width analyzer is used to give a specialized fixed-point representation for each operand/operator in the controller system. After bit-width analysis, a VHDL represen-tation of the system is generated. Results show that the proposed methodology leads to shorten design cycles achieving important resource savings by employing specialized fixed-point repre-sentations.IEEESapientiaLima, JoãoMenotti, RicardoCardoso, João M. P.Marques, Eduardo2012-05-12T09:39:08Z20062006-01-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10400.1/1153engAUT: JLI00543;info:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-07-24T10:12:10Zoai:sapientia.ualg.pt:10400.1/1153Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T19:55:23.085598Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv A Methodology to Design FPGA-based PID Controllers
title A Methodology to Design FPGA-based PID Controllers
spellingShingle A Methodology to Design FPGA-based PID Controllers
Lima, João
PID (Proportional
FPGAs (Field-Programmable Gate Arrays)
Bit-width analyzer
Derivative) controllers
Integral
title_short A Methodology to Design FPGA-based PID Controllers
title_full A Methodology to Design FPGA-based PID Controllers
title_fullStr A Methodology to Design FPGA-based PID Controllers
title_full_unstemmed A Methodology to Design FPGA-based PID Controllers
title_sort A Methodology to Design FPGA-based PID Controllers
author Lima, João
author_facet Lima, João
Menotti, Ricardo
Cardoso, João M. P.
Marques, Eduardo
author_role author
author2 Menotti, Ricardo
Cardoso, João M. P.
Marques, Eduardo
author2_role author
author
author
dc.contributor.none.fl_str_mv Sapientia
dc.contributor.author.fl_str_mv Lima, João
Menotti, Ricardo
Cardoso, João M. P.
Marques, Eduardo
dc.subject.por.fl_str_mv PID (Proportional
FPGAs (Field-Programmable Gate Arrays)
Bit-width analyzer
Derivative) controllers
Integral
topic PID (Proportional
FPGAs (Field-Programmable Gate Arrays)
Bit-width analyzer
Derivative) controllers
Integral
description This paper presents a methodology to implement PID (Proportional, Integral, Derivative) controllers in FPGAs (Field-Programmable Gate Arrays) using fixed-point numerical representation. The Matlab/Simulink environment is used for modeling, simulation and evaluation the performance provided by different fixed-point representations using a given control process. A static bit-width analyzer is used to give a specialized fixed-point representation for each operand/operator in the controller system. After bit-width analysis, a VHDL represen-tation of the system is generated. Results show that the proposed methodology leads to shorten design cycles achieving important resource savings by employing specialized fixed-point repre-sentations.
publishDate 2006
dc.date.none.fl_str_mv 2006
2006-01-01T00:00:00Z
2012-05-12T09:39:08Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
format article
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dc.identifier.uri.fl_str_mv http://hdl.handle.net/10400.1/1153
url http://hdl.handle.net/10400.1/1153
dc.language.iso.fl_str_mv eng
language eng
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dc.publisher.none.fl_str_mv IEEE
publisher.none.fl_str_mv IEEE
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
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collection Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
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