Study and Implementation of a Hardware Cross Architecture Virtualization Accelerator

• Autor(a) principal: João Pedro Vigário Garrido
• Data de Publicação: 2021
• Tipo de documento: Dissertação
• Idioma: eng
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: https://hdl.handle.net/10216/135289
• topic: Engenharia electrotécnica, electrónica e informática; Electrical engineering, Electronic engineering, Information engineering

In recent years, virtualization grew as a software technology with near-native performance while achieving the goals of isolating the hardware, operating system, and software environment. This is not possible if the architecture of the host and guest platforms are not the same, which leads to a large performance penalty since software emulation must be used. In this dissertation, a study of possible solutions is conducted and a hardware/software co-design solution based on the Xilinx ZynqMP platform (Accelerator) is proposed and implemented. This implementation addresses the specific problem of emulating an arm64 system on an x86 host PC. To integrate well with the current cross-architecture virtual environment, it uses KVM running on the Accelerator and QEMU running on the host PC, along with the necessary communication software between the host and the Accelerator. To minimize latency between the host and accelerator, PCIe is used as the communication channel.