Reliability and availability in reconfigurable computing: A basis for a common solution

Detalhes bibliográficos
Autor(a) principal: Manuel G. Gericota
Data de Publicação: 2008
Outros Autores: Gustavo R. Alves, Miguel L. Silva, José M. Ferreira
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: https://repositorio-aberto.up.pt/handle/10216/84619
Resumo: Dynamically reconfigurable SRAM-based field-programmable gate arrays (FPGAs) enable the implementation of reconfigurable computing systems where several applications may be run simultaneously, sharing the available resources according to their own immediate functional requirements. To exclude malfunctioning due to faulty elements, the reliability of all FPGA resources must be guaranteed. Since resource allocation takes place asynchronously, an online structural test scheme is the only way of ensuring reliable system operation. On the other hand, this test scheme should not disturb the operation of the circuit, otherwise availability would be compromised. System performance is also influenced by the efficiency of the management strategies that must be able to dynamically allocate enough resources when requested by each application. As those resources are allocated and later released, many small free resource blocks are created, which are left unused due to performance and routing restrictions. To avoid wasting logic resources, the FPGA logic space must be defragmented regularly. This paper presents a non-intrusive active replication procedure that supports the proposed test methodology and the implementation of defragmentation strategies, assuring both the availability of resources and their perfect working condition, without disturbing system operation.
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spelling Reliability and availability in reconfigurable computing: A basis for a common solutionEngenharia electrotécnica, electrónica e informáticaElectrical engineering, Electronic engineering, Information engineeringDynamically reconfigurable SRAM-based field-programmable gate arrays (FPGAs) enable the implementation of reconfigurable computing systems where several applications may be run simultaneously, sharing the available resources according to their own immediate functional requirements. To exclude malfunctioning due to faulty elements, the reliability of all FPGA resources must be guaranteed. Since resource allocation takes place asynchronously, an online structural test scheme is the only way of ensuring reliable system operation. On the other hand, this test scheme should not disturb the operation of the circuit, otherwise availability would be compromised. System performance is also influenced by the efficiency of the management strategies that must be able to dynamically allocate enough resources when requested by each application. As those resources are allocated and later released, many small free resource blocks are created, which are left unused due to performance and routing restrictions. To avoid wasting logic resources, the FPGA logic space must be defragmented regularly. This paper presents a non-intrusive active replication procedure that supports the proposed test methodology and the implementation of defragmentation strategies, assuring both the availability of resources and their perfect working condition, without disturbing system operation.20082008-01-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttps://repositorio-aberto.up.pt/handle/10216/84619eng1063-821010.1109/TVLSI.2008.2001141Manuel G. GericotaGustavo R. AlvesMiguel L. SilvaJosé M. Ferreirainfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-11-29T13:31:58Zoai:repositorio-aberto.up.pt:10216/84619Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T23:42:04.757427Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv Reliability and availability in reconfigurable computing: A basis for a common solution
title Reliability and availability in reconfigurable computing: A basis for a common solution
spellingShingle Reliability and availability in reconfigurable computing: A basis for a common solution
Manuel G. Gericota
Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
title_short Reliability and availability in reconfigurable computing: A basis for a common solution
title_full Reliability and availability in reconfigurable computing: A basis for a common solution
title_fullStr Reliability and availability in reconfigurable computing: A basis for a common solution
title_full_unstemmed Reliability and availability in reconfigurable computing: A basis for a common solution
title_sort Reliability and availability in reconfigurable computing: A basis for a common solution
author Manuel G. Gericota
author_facet Manuel G. Gericota
Gustavo R. Alves
Miguel L. Silva
José M. Ferreira
author_role author
author2 Gustavo R. Alves
Miguel L. Silva
José M. Ferreira
author2_role author
author
author
dc.contributor.author.fl_str_mv Manuel G. Gericota
Gustavo R. Alves
Miguel L. Silva
José M. Ferreira
dc.subject.por.fl_str_mv Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
topic Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
description Dynamically reconfigurable SRAM-based field-programmable gate arrays (FPGAs) enable the implementation of reconfigurable computing systems where several applications may be run simultaneously, sharing the available resources according to their own immediate functional requirements. To exclude malfunctioning due to faulty elements, the reliability of all FPGA resources must be guaranteed. Since resource allocation takes place asynchronously, an online structural test scheme is the only way of ensuring reliable system operation. On the other hand, this test scheme should not disturb the operation of the circuit, otherwise availability would be compromised. System performance is also influenced by the efficiency of the management strategies that must be able to dynamically allocate enough resources when requested by each application. As those resources are allocated and later released, many small free resource blocks are created, which are left unused due to performance and routing restrictions. To avoid wasting logic resources, the FPGA logic space must be defragmented regularly. This paper presents a non-intrusive active replication procedure that supports the proposed test methodology and the implementation of defragmentation strategies, assuring both the availability of resources and their perfect working condition, without disturbing system operation.
publishDate 2008
dc.date.none.fl_str_mv 2008
2008-01-01T00:00:00Z
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dc.identifier.uri.fl_str_mv https://repositorio-aberto.up.pt/handle/10216/84619
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dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 1063-8210
10.1109/TVLSI.2008.2001141
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