Real time fault injection using enhanced OCD - a performance analysis

Detalhes bibliográficos
Autor(a) principal: André V. Fidalgo
Data de Publicação: 2006
Outros Autores: Gustavo R. Alves, José M. Ferreira
Tipo de documento: Livro
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: https://hdl.handle.net/10216/84659
Resumo: Fault injection is frequently used for the verification and validation of dependable systems. When targeting real time microprocessor based systems the process becomes significantly more complex. This paper proposes two complementary solutions to improve real time fault injection campaign execution, both in terms of performance and capabilities. The methodology is based on the use of the on-chip debug mechanisms present in modern electronic devices. The main objective is the injection of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented and compared in terms of performance gain and logic overhead.
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spelling Real time fault injection using enhanced OCD - a performance analysisEngenharia electrotécnica, electrónica e informáticaElectrical engineering, Electronic engineering, Information engineeringFault injection is frequently used for the verification and validation of dependable systems. When targeting real time microprocessor based systems the process becomes significantly more complex. This paper proposes two complementary solutions to improve real time fault injection campaign execution, both in terms of performance and capabilities. The methodology is based on the use of the on-chip debug mechanisms present in modern electronic devices. The main objective is the injection of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented and compared in terms of performance gain and logic overhead.20062006-01-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/bookapplication/pdfhttps://hdl.handle.net/10216/84659eng10.1109/DFT.2006.51André V. FidalgoGustavo R. AlvesJosé M. Ferreirainfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-11-29T14:16:14Zoai:repositorio-aberto.up.pt:10216/84659Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T23:57:57.637194Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv Real time fault injection using enhanced OCD - a performance analysis
title Real time fault injection using enhanced OCD - a performance analysis
spellingShingle Real time fault injection using enhanced OCD - a performance analysis
André V. Fidalgo
Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
title_short Real time fault injection using enhanced OCD - a performance analysis
title_full Real time fault injection using enhanced OCD - a performance analysis
title_fullStr Real time fault injection using enhanced OCD - a performance analysis
title_full_unstemmed Real time fault injection using enhanced OCD - a performance analysis
title_sort Real time fault injection using enhanced OCD - a performance analysis
author André V. Fidalgo
author_facet André V. Fidalgo
Gustavo R. Alves
José M. Ferreira
author_role author
author2 Gustavo R. Alves
José M. Ferreira
author2_role author
author
dc.contributor.author.fl_str_mv André V. Fidalgo
Gustavo R. Alves
José M. Ferreira
dc.subject.por.fl_str_mv Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
topic Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
description Fault injection is frequently used for the verification and validation of dependable systems. When targeting real time microprocessor based systems the process becomes significantly more complex. This paper proposes two complementary solutions to improve real time fault injection campaign execution, both in terms of performance and capabilities. The methodology is based on the use of the on-chip debug mechanisms present in modern electronic devices. The main objective is the injection of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented and compared in terms of performance gain and logic overhead.
publishDate 2006
dc.date.none.fl_str_mv 2006
2006-01-01T00:00:00Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/book
format book
status_str publishedVersion
dc.identifier.uri.fl_str_mv https://hdl.handle.net/10216/84659
url https://hdl.handle.net/10216/84659
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 10.1109/DFT.2006.51
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
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collection Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
repository.name.fl_str_mv Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
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