RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceivers

Detalhes bibliográficos
Autor(a) principal: Santos, Ana Isabel Ferreira dos
Data de Publicação: 2023
Tipo de documento: Dissertação
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: http://hdl.handle.net/10362/160970
Resumo: The increasing market of Narrowband Internet of Things (NB-IoT) applications brings new challenges and constrains in the design of fully integrated transmission architectures, capable of delivering the desired output power with the highest efficiency and linearity, ensuring the longest battery lifetime of the devices. This work is focused on the study and implementation of the most power consuming block within the transmission chain: the Power Amplifier (PA). In this regard, a Switched Capacitor Power Amplifier (SCPA) is designed to operate at a frequency of 0.9 GHz and aiming the maximum output power allowed by the standard of 23 dBm. The final architecture includes a matching network that connects to eight unit PA cells through an LC filter. Each unit PA cell is made of a cascoded class-D PA, two drivers, a level shifter and two selection logic blocks. All the blocks were developed using RF components from a UMC 130nm CMOS process with a 1.2V/2.4V supply voltage. The results show that the architecture is able to produce a maximum output power of 15.61 dBm with a maximum Power Added Efficiency (PAE) of 26.52% and a Total Harmonic Distortion (THD) of 0.68%. In the same conditions, the measured HD2 and HD3 are of -70.23dBc and -43.41dBc, respectively. Additionally, a modulation stage was implemented in VerilogA in order to evaluate the impact of sending different symbols in the SCPA performance. The block, designed for a 16 QAM modulation, is responsible for generating both the number of unit PA cells to be selected and the phase of the clock connected to each PA cell, depending on the amplitude and phase of the constellation points being transmitted.
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spelling RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceiversSCPAMatching NetworkCascoded Class-DPAETHDCMOSDomínio/Área Científica::Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e InformáticaThe increasing market of Narrowband Internet of Things (NB-IoT) applications brings new challenges and constrains in the design of fully integrated transmission architectures, capable of delivering the desired output power with the highest efficiency and linearity, ensuring the longest battery lifetime of the devices. This work is focused on the study and implementation of the most power consuming block within the transmission chain: the Power Amplifier (PA). In this regard, a Switched Capacitor Power Amplifier (SCPA) is designed to operate at a frequency of 0.9 GHz and aiming the maximum output power allowed by the standard of 23 dBm. The final architecture includes a matching network that connects to eight unit PA cells through an LC filter. Each unit PA cell is made of a cascoded class-D PA, two drivers, a level shifter and two selection logic blocks. All the blocks were developed using RF components from a UMC 130nm CMOS process with a 1.2V/2.4V supply voltage. The results show that the architecture is able to produce a maximum output power of 15.61 dBm with a maximum Power Added Efficiency (PAE) of 26.52% and a Total Harmonic Distortion (THD) of 0.68%. In the same conditions, the measured HD2 and HD3 are of -70.23dBc and -43.41dBc, respectively. Additionally, a modulation stage was implemented in VerilogA in order to evaluate the impact of sending different symbols in the SCPA performance. The block, designed for a 16 QAM modulation, is responsible for generating both the number of unit PA cells to be selected and the phase of the clock connected to each PA cell, depending on the amplitude and phase of the constellation points being transmitted.O mercado crescente de aplicações IoT de largura de banda estreita coloca novos desafios e restrições no desenvolvimento de arquiteturas de transmissão totalmente integradas, capazes de produzir a potência desejada com o máximo de eficiência e linearidade possí- veis, de forma a garantir o maior tempo de vida de bateria dos dispositivos. Este trabalho foca-se no estudo e implementação do bloco da cadeia de transmissão que mais consome: o amplificador de potência. Neste sentido, um amplificador de potência de condensadores comutados é desenhado para operar à frequência de 0.9GHz com o objetivo de produzir à sua saída o valor de potência máxima permitida pelo standard de 23dBm. A arquitetura inclui uma malha de adaptação que liga a oito PAs unitários através de um filtro LC. Cada PA unitário consiste num amplificador de potencia class-D cascoded, dois drivers, um level shifter e dois blocos de lógica de seleção. Todos estes blocos foram desenvolvidos usando componentes RF da tecnologia CMOS 130nm da UMC com uma tensão de alimentação de 1.2V/2.4V. Os resultados mostram que a arquitetura é capaz de produzir uma potência à saída de 15.61dBm, com uma PAE de 26.52% e uma distorção harmónica total de 0.68%. Nas mesmas condições, os valores medidos da HD2 e HD3 são de -70.23dBc e -43.41dBc, respetivamente. Adicionalmente, um andar de modulação foi implementado em VerilogA, de forma a avaliar o impacto de enviar diferentes símbolos na performance do amplificador. Este bloco, desenvolvido para uma modulacao 16QAM, é responsável por gerar o número de unidades de PA a serem selecionados e o relógio de fase que liga a cada PA unitário, dependendo da amplitude e fase dos pontos da constelação a serem transmitidos.Oliveira, JoãoRUNSantos, Ana Isabel Ferreira dos2023-12-07T12:40:56Z2023-052023-05-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/masterThesisapplication/pdfhttp://hdl.handle.net/10362/160970enginfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2024-03-11T05:43:43Zoai:run.unl.pt:10362/160970Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-20T03:58:17.088170Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceivers
title RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceivers
spellingShingle RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceivers
Santos, Ana Isabel Ferreira dos
SCPA
Matching Network
Cascoded Class-D
PAE
THD
CMOS
Domínio/Área Científica::Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
title_short RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceivers
title_full RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceivers
title_fullStr RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceivers
title_full_unstemmed RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceivers
title_sort RF-CMOS Switched-Capacitor Power Amplifier for NB-IoT RF transceivers
author Santos, Ana Isabel Ferreira dos
author_facet Santos, Ana Isabel Ferreira dos
author_role author
dc.contributor.none.fl_str_mv Oliveira, João
RUN
dc.contributor.author.fl_str_mv Santos, Ana Isabel Ferreira dos
dc.subject.por.fl_str_mv SCPA
Matching Network
Cascoded Class-D
PAE
THD
CMOS
Domínio/Área Científica::Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
topic SCPA
Matching Network
Cascoded Class-D
PAE
THD
CMOS
Domínio/Área Científica::Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
description The increasing market of Narrowband Internet of Things (NB-IoT) applications brings new challenges and constrains in the design of fully integrated transmission architectures, capable of delivering the desired output power with the highest efficiency and linearity, ensuring the longest battery lifetime of the devices. This work is focused on the study and implementation of the most power consuming block within the transmission chain: the Power Amplifier (PA). In this regard, a Switched Capacitor Power Amplifier (SCPA) is designed to operate at a frequency of 0.9 GHz and aiming the maximum output power allowed by the standard of 23 dBm. The final architecture includes a matching network that connects to eight unit PA cells through an LC filter. Each unit PA cell is made of a cascoded class-D PA, two drivers, a level shifter and two selection logic blocks. All the blocks were developed using RF components from a UMC 130nm CMOS process with a 1.2V/2.4V supply voltage. The results show that the architecture is able to produce a maximum output power of 15.61 dBm with a maximum Power Added Efficiency (PAE) of 26.52% and a Total Harmonic Distortion (THD) of 0.68%. In the same conditions, the measured HD2 and HD3 are of -70.23dBc and -43.41dBc, respectively. Additionally, a modulation stage was implemented in VerilogA in order to evaluate the impact of sending different symbols in the SCPA performance. The block, designed for a 16 QAM modulation, is responsible for generating both the number of unit PA cells to be selected and the phase of the clock connected to each PA cell, depending on the amplitude and phase of the constellation points being transmitted.
publishDate 2023
dc.date.none.fl_str_mv 2023-12-07T12:40:56Z
2023-05
2023-05-01T00:00:00Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/masterThesis
format masterThesis
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://hdl.handle.net/10362/160970
url http://hdl.handle.net/10362/160970
dc.language.iso.fl_str_mv eng
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instacron:RCAAP
instname_str Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
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collection Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
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