Prototipagem PCIe com o Speed Adaptor no HAPS-100

• Autor(a) principal: Chen, Filipe
• Data de Publicação: 2021
• Tipo de documento: Dissertação
• Idioma: eng
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: http://hdl.handle.net/10400.22/19358
• topic: FPGA; Prototyping; Simulation; Emulation; Timing Closure; PCIe; Speed Adaptor; Design flow; Prototipagem; Simulação; Emulação; Timing Closure

FPGAs are powerful components as they allow for faster verification, helping accelerate the development of a prototype. Nonetheless, as technology advances, they need to adapt to the new configurations and speeds which boost the performance previously known. Therefore, Speed Adaptors are needed to close this speed gap so that the timings of data transfer match, resulting in proper verification procedures and correct debugging. Throughout this work, many topics related to the Speed Adaptor are introduced, providing enough information for the reader to understand the basic architecture of the Speed Adaptor system. The Speed Adaptor requirements got met following the RTL design flow, which serves as a guideline to program the FPGA. Accordingly, Synopsys’ tools got used to analyse the Speed Adaptor simulation and search for problems during the implementation phase, such as timing closure and area occupation. Moreover, as the simulation problems arose, timing closure and some methodologies got explored, displaying why a negative Worst Hold Slack is a problem and how the solution got debugged by rerouting and replacing clocks. Due to the delayed configuration of the HAPS-100, a Synopsys rapid prototyping platform, and the delay debugging the timing closure, the hardware setup is still half complete. However, it could still be possible to document the successful link up with the high-speed side of the system connected to the PCIe endpoint. Although it was not possible to test the HAPS-100 to compare to the simulation results, this dissertation successfully delivers the information needed for the reader to comprehend the Speed Adaptor functionalities.