Implementing a Self-Checking Profibus Slave

Detalhes bibliográficos
Autor(a) principal: Margrit Reni Krug
Data de Publicação: 2000
Outros Autores: Marcelo Lubaszewski, José Manuel Martins Ferreira, Gustavo Ribeiro da Costa Alves
Tipo de documento: Livro
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: https://hdl.handle.net/10216/85025
Resumo: This work presents the study and preliminary results of the high level implementation of a self-checking Profibus slave. From an existing VHDL description of the device, a test strategy was studied and implemented, so that the whole circuit has embedded test structures capable to perform at-speed test of the slave. In this paper, we show the used test strategies and implementation results achieved from a synthesis process in a FPGA environment.
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spelling Implementing a Self-Checking Profibus SlaveEngenharia electrotécnica, Engenharia electrotécnica, electrónica e informáticaElectrical engineering, Electrical engineering, Electronic engineering, Information engineeringThis work presents the study and preliminary results of the high level implementation of a self-checking Profibus slave. From an existing VHDL description of the device, a test strategy was studied and implemented, so that the whole circuit has embedded test structures capable to perform at-speed test of the slave. In this paper, we show the used test strategies and implementation results achieved from a synthesis process in a FPGA environment.20002000-01-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/bookapplication/pdfhttps://hdl.handle.net/10216/85025engMargrit Reni KrugMarcelo LubaszewskiJosé Manuel Martins FerreiraGustavo Ribeiro da Costa Alvesinfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-11-29T14:00:08Zoai:repositorio-aberto.up.pt:10216/85025Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T23:52:07.554508Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv Implementing a Self-Checking Profibus Slave
title Implementing a Self-Checking Profibus Slave
spellingShingle Implementing a Self-Checking Profibus Slave
Margrit Reni Krug
Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
title_short Implementing a Self-Checking Profibus Slave
title_full Implementing a Self-Checking Profibus Slave
title_fullStr Implementing a Self-Checking Profibus Slave
title_full_unstemmed Implementing a Self-Checking Profibus Slave
title_sort Implementing a Self-Checking Profibus Slave
author Margrit Reni Krug
author_facet Margrit Reni Krug
Marcelo Lubaszewski
José Manuel Martins Ferreira
Gustavo Ribeiro da Costa Alves
author_role author
author2 Marcelo Lubaszewski
José Manuel Martins Ferreira
Gustavo Ribeiro da Costa Alves
author2_role author
author
author
dc.contributor.author.fl_str_mv Margrit Reni Krug
Marcelo Lubaszewski
José Manuel Martins Ferreira
Gustavo Ribeiro da Costa Alves
dc.subject.por.fl_str_mv Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
topic Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
description This work presents the study and preliminary results of the high level implementation of a self-checking Profibus slave. From an existing VHDL description of the device, a test strategy was studied and implemented, so that the whole circuit has embedded test structures capable to perform at-speed test of the slave. In this paper, we show the used test strategies and implementation results achieved from a synthesis process in a FPGA environment.
publishDate 2000
dc.date.none.fl_str_mv 2000
2000-01-01T00:00:00Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/book
format book
status_str publishedVersion
dc.identifier.uri.fl_str_mv https://hdl.handle.net/10216/85025
url https://hdl.handle.net/10216/85025
dc.language.iso.fl_str_mv eng
language eng
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
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instacron:RCAAP
instname_str Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
instacron_str RCAAP
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reponame_str Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
collection Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
repository.name.fl_str_mv Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
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