Multirate Simulations With Simultaneous-Solution Using Direct Integration Methods in a Partitioned Network Environment

Detalhes bibliográficos
Autor(a) principal: Moreira, F. A.
Data de Publicação: 2006
Outros Autores: Linares, L. R.
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Institucional da UFBA
Texto Completo: http://www.repositorio.ufba.br/ri/handle/ri/6316
Resumo: Multirate simulation of electric networks exhibiting a wide variety of time constants decreases the simulation runtimes by exploiting the property of circuit latency. The fundamental idea is to use different integration steps for different network subsystems, according to the requirements of accuracy of each subsystem. Programs that exploit circuit latency are usually based on relaxation methods that require iterations among the different subsystems of the original networks. These methods lack the numerical robustness of direct implicit integration methods used in circuit simulators and are not adequate for real-time simulation due to their non-uniform solution times. This paper proposes circuit latency exploitation without iterations making use of the concept of interlinked Multi-Area Thevenin Equivalents (MATE). Results are presented showing the efficiency and accuracy of the method
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spelling Moreira, F. A.Linares, L. R.Moreira, F. A.Linares, L. R.2012-07-04T15:55:14Z2012-07-04T15:55:14Z2006http://www.repositorio.ufba.br/ri/handle/ri/6316v.53, n.12Multirate simulation of electric networks exhibiting a wide variety of time constants decreases the simulation runtimes by exploiting the property of circuit latency. The fundamental idea is to use different integration steps for different network subsystems, according to the requirements of accuracy of each subsystem. Programs that exploit circuit latency are usually based on relaxation methods that require iterations among the different subsystems of the original networks. These methods lack the numerical robustness of direct implicit integration methods used in circuit simulators and are not adequate for real-time simulation due to their non-uniform solution times. This paper proposes circuit latency exploitation without iterations making use of the concept of interlinked Multi-Area Thevenin Equivalents (MATE). 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dc.title.pt_BR.fl_str_mv Multirate Simulations With Simultaneous-Solution Using Direct Integration Methods in a Partitioned Network Environment
dc.title.alternative.pt_BR.fl_str_mv Browse Journals & Magazines
title Multirate Simulations With Simultaneous-Solution Using Direct Integration Methods in a Partitioned Network Environment
spellingShingle Multirate Simulations With Simultaneous-Solution Using Direct Integration Methods in a Partitioned Network Environment
Moreira, F. A.
Analytical models
Circuit simulation
Computational modeling
Context modeling
Delay
Power engineering and energy
Robustness
title_short Multirate Simulations With Simultaneous-Solution Using Direct Integration Methods in a Partitioned Network Environment
title_full Multirate Simulations With Simultaneous-Solution Using Direct Integration Methods in a Partitioned Network Environment
title_fullStr Multirate Simulations With Simultaneous-Solution Using Direct Integration Methods in a Partitioned Network Environment
title_full_unstemmed Multirate Simulations With Simultaneous-Solution Using Direct Integration Methods in a Partitioned Network Environment
title_sort Multirate Simulations With Simultaneous-Solution Using Direct Integration Methods in a Partitioned Network Environment
author Moreira, F. A.
author_facet Moreira, F. A.
Linares, L. R.
author_role author
author2 Linares, L. R.
author2_role author
dc.contributor.author.fl_str_mv Moreira, F. A.
Linares, L. R.
Moreira, F. A.
Linares, L. R.
dc.subject.por.fl_str_mv Analytical models
Circuit simulation
Computational modeling
Context modeling
Delay
Power engineering and energy
Robustness
topic Analytical models
Circuit simulation
Computational modeling
Context modeling
Delay
Power engineering and energy
Robustness
description Multirate simulation of electric networks exhibiting a wide variety of time constants decreases the simulation runtimes by exploiting the property of circuit latency. The fundamental idea is to use different integration steps for different network subsystems, according to the requirements of accuracy of each subsystem. Programs that exploit circuit latency are usually based on relaxation methods that require iterations among the different subsystems of the original networks. These methods lack the numerical robustness of direct implicit integration methods used in circuit simulators and are not adequate for real-time simulation due to their non-uniform solution times. This paper proposes circuit latency exploitation without iterations making use of the concept of interlinked Multi-Area Thevenin Equivalents (MATE). Results are presented showing the efficiency and accuracy of the method
publishDate 2006
dc.date.issued.fl_str_mv 2006
dc.date.accessioned.fl_str_mv 2012-07-04T15:55:14Z
dc.date.available.fl_str_mv 2012-07-04T15:55:14Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
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status_str publishedVersion
dc.identifier.uri.fl_str_mv http://www.repositorio.ufba.br/ri/handle/ri/6316
dc.identifier.number.pt_BR.fl_str_mv v.53, n.12
url http://www.repositorio.ufba.br/ri/handle/ri/6316
identifier_str_mv v.53, n.12
dc.language.iso.fl_str_mv eng
language eng
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.publisher.none.fl_str_mv Browse Journals & Magazines
publisher.none.fl_str_mv Browse Journals & Magazines
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institution UFBA
reponame_str Repositório Institucional da UFBA
collection Repositório Institucional da UFBA
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