Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurável

Detalhes bibliográficos
Autor(a) principal: Dessbesell, Gustavo Fernando
Data de Publicação: 2008
Tipo de documento: Dissertação
Idioma: por
Título da fonte: Manancial - Repositório Digital da UFSM
Texto Completo: http://repositorio.ufsm.br/handle/1/8448
Resumo: This work presents the implementation and analysis of a system devoted to the extraction and recognition of optical characters which is based on the hardware and software co-design methodology and built over a reconfigurable platform. Since vision is a very important sense, the research in the field of artificial vision systems has been carried out since the very beginning of the digital era, in the early 60 s. Taking into account the recent evolution experienced by the configurable computing area, a new tendency of research and development of heterogeneous artificial vision systems emerges. Among the main benefits provided by the so called systems on chip are the reduction of power dissipation, financial costs and physical area. In this sense, taking a License Plate Recognition System (LPRS) as a case study, the focus of this work is the implementation of the character localization and recognition steps, while the partitioning of hardware and software resources is based in costbenefit heuristics. Initially, a software-only version of the system is build over an x86 platform. More than to allow the evaluation of several character localization related methods, this software-only version is also intended to be used as parameter of comparison for the embedded version of the system. Regarding the character recognition step, it is performed by the means of an Artificial Neural Network. Based on the results provided by the software-only evaluation system, the implementation of the embedded version is performed, considering an FPGA as platform. In this embedded version, the character localization step consists of a dedicated hardware block, while the character recognition step comprises a piece of software executed in a microprocessor that is physically implemented inside the FPGA. Taking into account a 10 times higher frequency of operation for the processor of the x86 platform, as well as the fact that most of the embedded hardware block employs a clock frequency smaller or equal to 25 MHz, the most noticeable result is the 2.25 times faster speed of processing achieved by the embedded version. Regarding the plate recognition capability, both systems have the same performance, being able to successfully recognize plates in 51.62 % of the cases (considering the best case). Beyond LPRSs, the system developed here could also be employed to build other applications that require optical character recognition features, such as automatic traffic signs recognition and serial number reading of items in a production line.
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spelling Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurávelExtraction and recognition of optical characters based on hardware and software co-design over reconfigurable platformVisão computacionalCo-projeto de software e hardwareFPGARedes neurais artificiaisSistemas embarcadosComputer visionHardware and software co-designFPGAArtificial neural networksEmbedded systemsCNPQ::ENGENHARIAS::ENGENHARIA ELETRICAThis work presents the implementation and analysis of a system devoted to the extraction and recognition of optical characters which is based on the hardware and software co-design methodology and built over a reconfigurable platform. Since vision is a very important sense, the research in the field of artificial vision systems has been carried out since the very beginning of the digital era, in the early 60 s. Taking into account the recent evolution experienced by the configurable computing area, a new tendency of research and development of heterogeneous artificial vision systems emerges. Among the main benefits provided by the so called systems on chip are the reduction of power dissipation, financial costs and physical area. In this sense, taking a License Plate Recognition System (LPRS) as a case study, the focus of this work is the implementation of the character localization and recognition steps, while the partitioning of hardware and software resources is based in costbenefit heuristics. Initially, a software-only version of the system is build over an x86 platform. More than to allow the evaluation of several character localization related methods, this software-only version is also intended to be used as parameter of comparison for the embedded version of the system. Regarding the character recognition step, it is performed by the means of an Artificial Neural Network. Based on the results provided by the software-only evaluation system, the implementation of the embedded version is performed, considering an FPGA as platform. In this embedded version, the character localization step consists of a dedicated hardware block, while the character recognition step comprises a piece of software executed in a microprocessor that is physically implemented inside the FPGA. Taking into account a 10 times higher frequency of operation for the processor of the x86 platform, as well as the fact that most of the embedded hardware block employs a clock frequency smaller or equal to 25 MHz, the most noticeable result is the 2.25 times faster speed of processing achieved by the embedded version. Regarding the plate recognition capability, both systems have the same performance, being able to successfully recognize plates in 51.62 % of the cases (considering the best case). Beyond LPRSs, the system developed here could also be employed to build other applications that require optical character recognition features, such as automatic traffic signs recognition and serial number reading of items in a production line.Conselho Nacional de Desenvolvimento Científico e TecnológicoEste trabalho apresenta a implementação e análise de um sistema voltado à extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre uma plataforma reconfigurável. Por conta da importância atribuída ao sentido da visão, sistemas artificiais capazes de emular as tarefas envolvidas neste processo biológico têm sido alvo de pesquisas desde o surgimento dos primeiros computadores digitais, na década de 60. Tendo em vista a recente evolução experimentada na área da computação configurável, surge uma tendência natural à pesquisa e desenvolvimento de sistemas heterogêneos (compostos por uma combinação de blocos de hardware e software) de visão artificial baseados em tal plataforma. Dentre os principais benefícios proporcionados por sistemas em chip podem ser citados a redução no consumo de potência, custos financeiros e área física. Neste sentido, tomando como estudo de caso um Sistema de Reconhecimento de Placas de Licenciamento Veicular (SRPLV), o foco do trabalho está situado na implementação das etapas de localização e reconhecimento de caracteres, sendo o particionamento dos blocos de hardware e software baseado em heurísticas de custo-benefício. Inicialmente é realizada a implementação de uma versão totalmente em software do sistema aqui proposto, sobre plataforma x86, no intuito de avaliar os diversos métodos passíveis de implementação, bem como o de possibilitar um parâmetro de comparação com a versão embarcada do sistema. Os métodos avaliados dizem respeito à etapa de localização de caracteres, haja vista a definição à priori do emprego de Redes Neurais Artificiais no reconhecimento dos mesmos. A partir dos resultados obtidos por esta avaliação é realizada a implementação da versão embarcada do sistema, tendo como plataforma um FPGA. Nesta versão, a etapa de localização de caracteres é implementada como um bloco dedicado de hardware, enquanto a de reconhecimento constitui-se num software executado sobre um microprocessador fisicamente embutido no interior do FPGA. Considerando uma freqüência de operação 10 vezes superior para o processador da plataforma x86, bem como o fato da maior parte do hardware embarcado utilizar um clock menor ou igual a 25 MHz, o principal resultado consiste no ganho de 2,25 vezes no tempo de execução obtido na segunda versão do sistema. No tocante à capacidade de reconhecimento de placas, os sistemas são equivalentes, sendo capazes de reconhecê-las corretamente em 51,62% das vezes, no melhor caso. Além de SRPLVs, o sistema aqui desenvolvido pode ser empregado na criação de outras aplicações que envolvam a problemática do reconhecimento de caracteres óticos, como reconhecimento automático de placas de trânsito e do número de série de itens numa linha de produção.Universidade Federal de Santa MariaBREngenharia ElétricaUFSMPrograma de Pós-Graduação em Engenharia ElétricaMartins, João Baptista dos Santoshttp://lattes.cnpq.br/3158303689784382Molz, Rolf Fredihttp://lattes.cnpq.br/5738153832159932Baratto, Giovanihttp://lattes.cnpq.br/9054887406340022Ribas, Renato Perezhttp://lattes.cnpq.br/1149542159006335Dessbesell, Gustavo Fernando2017-05-262017-05-262008-03-07info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/masterThesisapplication/pdfapplication/pdfDESSBESELL, Gustavo Fernando. Extraction and recognition of optical characters based on hardware and software co-design over reconfigurable platform. 2008. 167 f. Dissertação (Mestrado em Engenharia Elétrica) - Universidade Federal de Santa Maria, Santa Maria, 2008.http://repositorio.ufsm.br/handle/1/8448porinfo:eu-repo/semantics/openAccessreponame:Manancial - Repositório Digital da UFSMinstname:Universidade Federal de Santa Maria (UFSM)instacron:UFSM2023-04-20T19:22:14Zoai:repositorio.ufsm.br:1/8448Biblioteca Digital de Teses e Dissertaçõeshttps://repositorio.ufsm.br/ONGhttps://repositorio.ufsm.br/oai/requestatendimento.sib@ufsm.br||tedebc@gmail.comopendoar:2023-04-20T19:22:14Manancial - Repositório Digital da UFSM - Universidade Federal de Santa Maria (UFSM)false
dc.title.none.fl_str_mv Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurável
Extraction and recognition of optical characters based on hardware and software co-design over reconfigurable platform
title Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurável
spellingShingle Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurável
Dessbesell, Gustavo Fernando
Visão computacional
Co-projeto de software e hardware
FPGA
Redes neurais artificiais
Sistemas embarcados
Computer vision
Hardware and software co-design
FPGA
Artificial neural networks
Embedded systems
CNPQ::ENGENHARIAS::ENGENHARIA ELETRICA
title_short Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurável
title_full Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurável
title_fullStr Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurável
title_full_unstemmed Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurável
title_sort Extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre plataforma reconfigurável
author Dessbesell, Gustavo Fernando
author_facet Dessbesell, Gustavo Fernando
author_role author
dc.contributor.none.fl_str_mv Martins, João Baptista dos Santos
http://lattes.cnpq.br/3158303689784382
Molz, Rolf Fredi
http://lattes.cnpq.br/5738153832159932
Baratto, Giovani
http://lattes.cnpq.br/9054887406340022
Ribas, Renato Perez
http://lattes.cnpq.br/1149542159006335
dc.contributor.author.fl_str_mv Dessbesell, Gustavo Fernando
dc.subject.por.fl_str_mv Visão computacional
Co-projeto de software e hardware
FPGA
Redes neurais artificiais
Sistemas embarcados
Computer vision
Hardware and software co-design
FPGA
Artificial neural networks
Embedded systems
CNPQ::ENGENHARIAS::ENGENHARIA ELETRICA
topic Visão computacional
Co-projeto de software e hardware
FPGA
Redes neurais artificiais
Sistemas embarcados
Computer vision
Hardware and software co-design
FPGA
Artificial neural networks
Embedded systems
CNPQ::ENGENHARIAS::ENGENHARIA ELETRICA
description This work presents the implementation and analysis of a system devoted to the extraction and recognition of optical characters which is based on the hardware and software co-design methodology and built over a reconfigurable platform. Since vision is a very important sense, the research in the field of artificial vision systems has been carried out since the very beginning of the digital era, in the early 60 s. Taking into account the recent evolution experienced by the configurable computing area, a new tendency of research and development of heterogeneous artificial vision systems emerges. Among the main benefits provided by the so called systems on chip are the reduction of power dissipation, financial costs and physical area. In this sense, taking a License Plate Recognition System (LPRS) as a case study, the focus of this work is the implementation of the character localization and recognition steps, while the partitioning of hardware and software resources is based in costbenefit heuristics. Initially, a software-only version of the system is build over an x86 platform. More than to allow the evaluation of several character localization related methods, this software-only version is also intended to be used as parameter of comparison for the embedded version of the system. Regarding the character recognition step, it is performed by the means of an Artificial Neural Network. Based on the results provided by the software-only evaluation system, the implementation of the embedded version is performed, considering an FPGA as platform. In this embedded version, the character localization step consists of a dedicated hardware block, while the character recognition step comprises a piece of software executed in a microprocessor that is physically implemented inside the FPGA. Taking into account a 10 times higher frequency of operation for the processor of the x86 platform, as well as the fact that most of the embedded hardware block employs a clock frequency smaller or equal to 25 MHz, the most noticeable result is the 2.25 times faster speed of processing achieved by the embedded version. Regarding the plate recognition capability, both systems have the same performance, being able to successfully recognize plates in 51.62 % of the cases (considering the best case). Beyond LPRSs, the system developed here could also be employed to build other applications that require optical character recognition features, such as automatic traffic signs recognition and serial number reading of items in a production line.
publishDate 2008
dc.date.none.fl_str_mv 2008-03-07
2017-05-26
2017-05-26
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/masterThesis
format masterThesis
status_str publishedVersion
dc.identifier.uri.fl_str_mv DESSBESELL, Gustavo Fernando. Extraction and recognition of optical characters based on hardware and software co-design over reconfigurable platform. 2008. 167 f. Dissertação (Mestrado em Engenharia Elétrica) - Universidade Federal de Santa Maria, Santa Maria, 2008.
http://repositorio.ufsm.br/handle/1/8448
identifier_str_mv DESSBESELL, Gustavo Fernando. Extraction and recognition of optical characters based on hardware and software co-design over reconfigurable platform. 2008. 167 f. Dissertação (Mestrado em Engenharia Elétrica) - Universidade Federal de Santa Maria, Santa Maria, 2008.
url http://repositorio.ufsm.br/handle/1/8448
dc.language.iso.fl_str_mv por
language por
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
application/pdf
dc.publisher.none.fl_str_mv Universidade Federal de Santa Maria
BR
Engenharia Elétrica
UFSM
Programa de Pós-Graduação em Engenharia Elétrica
publisher.none.fl_str_mv Universidade Federal de Santa Maria
BR
Engenharia Elétrica
UFSM
Programa de Pós-Graduação em Engenharia Elétrica
dc.source.none.fl_str_mv reponame:Manancial - Repositório Digital da UFSM
instname:Universidade Federal de Santa Maria (UFSM)
instacron:UFSM
instname_str Universidade Federal de Santa Maria (UFSM)
instacron_str UFSM
institution UFSM
reponame_str Manancial - Repositório Digital da UFSM
collection Manancial - Repositório Digital da UFSM
repository.name.fl_str_mv Manancial - Repositório Digital da UFSM - Universidade Federal de Santa Maria (UFSM)
repository.mail.fl_str_mv atendimento.sib@ufsm.br||tedebc@gmail.com
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