Análise e projeto do conversor buck intercalado para alimentação de lâmpadas de descarga em alta pressão de alta potência

• Autor(a) principal: Schittler, Andressa Colvero
• Data de Publicação: 2012
• Tipo de documento: Dissertação
• Idioma: por
• Título da fonte: Manancial - Repositório Digital da UFSM
• dARK ID: ark:/26339/001300000vf93
• Texto Completo: http://repositorio.ufsm.br/handle/1/8504
• topic: Conversores intercalados; Lâmpadas de descarga em alta pressão; Reator eletrônico; Electronic ballasts; Interleaved converters; HID lamps; CNPQ::ENGENHARIAS::ENGENHARIA ELETRICA

This work presents a detailed analysis about the interleaved buck converter applied to electronic ballasts to supply high power HID lamps, assuming the input voltage as a PFC stage output. As the output capacitor has a maximum value to be applied in parallel with the lamp, parallel operated converters are a suitable choice because the output current ripple cancellation characteristic. Besides, the output current ripple cannot be greater than 5% of the nominal current to avoid acoustic resonance phenomena. Also, interleaved converters allow magnetic and semiconductors losses reduction. The applied topology was the interleaved buck converter, because its inherent characteritstic of the output as a current source. A generalized model for the IBC operating in CCM was obtained, including inductors and semiconductors losses, besides an analysis to achieve the optimum point of design in terms of efficiency, size and complexity of implementation. To apply the IBC in CCM supplying HID lamps, it is necessary inductors current control, which means to guarantee a current source behavior of the converter. For that, two current control loop were designed, one for each inductor being measured via a shunt resistor located at the circuit input. Also, stability was analyzed based on impedance criterion. Finally, complete electronic ballast was presented, gathering a two-cell IBC, full-bridge inverter, measuring circuits for current and voltage and an external circuit for the correct delay of the IBC MOSFETs gate signals. Obtained experimental results were satisfatory, showing equal current sharing, once warm-up stage and closed-loop implementation were via an 8-bits microcontroller.