Projeto de circuitos integrados para balanço de carga e redução da tensão residual em estimulação neural

• Autor(a) principal: Teixeira, Lucas
• Data de Publicação: 2015
• Tipo de documento: Dissertação
• Idioma: por
• Título da fonte: Manancial - Repositório Digital da UFSM
• Texto Completo: http://repositorio.ufsm.br/handle/1/5453
• topic: Neuroestimulação; Estimulação elétrica funcional - EFS; Circuito integrado; Balanceamento de carga; Controle de tensão residual; Electrical functional stimulation; Neurostimulation; Integrated circuit; Charge balance; Residual voltage control; CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO

The Electrical Functional Stimulation (EFS) allows the direct connection between man and machine through electrical signals. The last years growth in EFS is possible because of the new technological resources that make it feasible. Restoring someone s vision or hearing, even parcially, is one among several contribution that EFS may contribute to human s well-being. However the interface between the electrical circuits and the tissue is sensitive to several factors. Among several effects that may damage the tissue and electrode in EFS we can find those caused by the electrical stimuli, this may harm the application. This work presents contributions regarding electrical circuits topologies for safety stimuli in EFS. It is essential to ensure proper electrical charge balance and a small residual voltage on the tissue-electrode interface. For each of these problems one proposal is presented, both share circuit blocks. The blocks to control intensity and polarity of stimuli are designed to avoid the integration of high voltage devices. The current mode stimuli is generated using an ultra-low power charge redistribution Digital to Analog Converter (DAC) for stimulus intensity definition. This DAC architecture even simplifies the feedback mechanism that is obtained directly from measurement circuit. The technic that uses only low voltage devices to measure electrodes current is presented, it is suitable to implement the charge balance control in an integrated circuit. This measurement technique is insensitive to capacitors mismatch and to the current measurement absolute ratio. That control is possible through the a simplified feedback path that joins the controller and the measurement in an efficient way acting directly in the DAC. The proposed residual voltage control technique requires only passive elements to be added to the circuit, that suggest a lower power consumption. The charge redistribution DAC keeps residual voltage information stored, in order to compensate it in next stimulation cycles. The stimulation cycle polarity is explored, alternated cathodic and anodic-first cycles are used in order to reduce the charge imbalance and residual voltage. Both proposals are presented and validated with electrical simulation, known metrics are used and the performance is equivalent to state-of-art in literature.