Towards a java bytecodes compiler for nios II soft-core processor

Detalhes bibliográficos
Autor(a) principal: Lima, Willian S. [UNESP]
Data de Publicação: 2009
Outros Autores: Lobato, Renata S. [UNESP], Manacero, Aleardo [UNESP], Spolon, Roberta [UNESP]
Tipo de documento: Artigo de conferência
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://dx.doi.org/10.1109/ISCC.2009.5202253
http://hdl.handle.net/11449/71241
Resumo: Reconfigurable computing is one of the most recent research topics in computer science. The Altera - Nios II soft-core processor can be included in a large set of reconfigurable architectures, especially because it is designed in software, allowing it to be configured according to the application. The recent growth in applications that demand reconfigurable computing made necessary the building of compilers that translate high level languages source codes into reconfigurable devices instruction sets. In this paper we present a compiler that takes as input the bytecodes generated by a Java front-end compiler and generates a set of instructions that attends to the Nios II processor instruction set rules. Our work shows how we process Java bytecodes to the intermediate code, in the Nios II instructions format, and build the control flow and the control dependence graphs. © 2009 IEEE.
id UNSP_2caadb2f029bc72432d9db4404e7f519
oai_identifier_str oai:repositorio.unesp.br:11449/71241
network_acronym_str UNSP
network_name_str Repositório Institucional da UNESP
repository_id_str 2946
spelling Towards a java bytecodes compiler for nios II soft-core processorBytecodesControl flowsDependence graphsInstruction setJava bytecodesNIOS IIReconfigurable architectureReconfigurable computingReconfigurable devicesResearch topicsSoft-core processorsSource codesBuilding codesComputer architectureHigh level languagesProgram compilersReconfigurable computing is one of the most recent research topics in computer science. The Altera - Nios II soft-core processor can be included in a large set of reconfigurable architectures, especially because it is designed in software, allowing it to be configured according to the application. The recent growth in applications that demand reconfigurable computing made necessary the building of compilers that translate high level languages source codes into reconfigurable devices instruction sets. In this paper we present a compiler that takes as input the bytecodes generated by a Java front-end compiler and generates a set of instructions that attends to the Nios II processor instruction set rules. Our work shows how we process Java bytecodes to the intermediate code, in the Nios II instructions format, and build the control flow and the control dependence graphs. © 2009 IEEE.DCCE UNESP São Paulo State UniversityDC UNESP São Paulo State UniversityDCCE UNESP São Paulo State UniversityDC UNESP São Paulo State UniversityUniversidade Estadual Paulista (Unesp)Lima, Willian S. [UNESP]Lobato, Renata S. [UNESP]Manacero, Aleardo [UNESP]Spolon, Roberta [UNESP]2014-05-27T11:24:02Z2014-05-27T11:24:02Z2009-11-19info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject104-109http://dx.doi.org/10.1109/ISCC.2009.5202253Proceedings - IEEE Symposium on Computers and Communications, p. 104-109.1530-1346http://hdl.handle.net/11449/7124110.1109/ISCC.2009.5202253WOS:0002771193000172-s2.0-7044951360555686813740948600000-0001-8248-0826Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPengProceedings - IEEE Symposium on Computers and Communications0,193info:eu-repo/semantics/openAccess2021-10-23T21:44:35Zoai:repositorio.unesp.br:11449/71241Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T23:53:22.277442Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv Towards a java bytecodes compiler for nios II soft-core processor
title Towards a java bytecodes compiler for nios II soft-core processor
spellingShingle Towards a java bytecodes compiler for nios II soft-core processor
Lima, Willian S. [UNESP]
Bytecodes
Control flows
Dependence graphs
Instruction set
Java bytecodes
NIOS II
Reconfigurable architecture
Reconfigurable computing
Reconfigurable devices
Research topics
Soft-core processors
Source codes
Building codes
Computer architecture
High level languages
Program compilers
title_short Towards a java bytecodes compiler for nios II soft-core processor
title_full Towards a java bytecodes compiler for nios II soft-core processor
title_fullStr Towards a java bytecodes compiler for nios II soft-core processor
title_full_unstemmed Towards a java bytecodes compiler for nios II soft-core processor
title_sort Towards a java bytecodes compiler for nios II soft-core processor
author Lima, Willian S. [UNESP]
author_facet Lima, Willian S. [UNESP]
Lobato, Renata S. [UNESP]
Manacero, Aleardo [UNESP]
Spolon, Roberta [UNESP]
author_role author
author2 Lobato, Renata S. [UNESP]
Manacero, Aleardo [UNESP]
Spolon, Roberta [UNESP]
author2_role author
author
author
dc.contributor.none.fl_str_mv Universidade Estadual Paulista (Unesp)
dc.contributor.author.fl_str_mv Lima, Willian S. [UNESP]
Lobato, Renata S. [UNESP]
Manacero, Aleardo [UNESP]
Spolon, Roberta [UNESP]
dc.subject.por.fl_str_mv Bytecodes
Control flows
Dependence graphs
Instruction set
Java bytecodes
NIOS II
Reconfigurable architecture
Reconfigurable computing
Reconfigurable devices
Research topics
Soft-core processors
Source codes
Building codes
Computer architecture
High level languages
Program compilers
topic Bytecodes
Control flows
Dependence graphs
Instruction set
Java bytecodes
NIOS II
Reconfigurable architecture
Reconfigurable computing
Reconfigurable devices
Research topics
Soft-core processors
Source codes
Building codes
Computer architecture
High level languages
Program compilers
description Reconfigurable computing is one of the most recent research topics in computer science. The Altera - Nios II soft-core processor can be included in a large set of reconfigurable architectures, especially because it is designed in software, allowing it to be configured according to the application. The recent growth in applications that demand reconfigurable computing made necessary the building of compilers that translate high level languages source codes into reconfigurable devices instruction sets. In this paper we present a compiler that takes as input the bytecodes generated by a Java front-end compiler and generates a set of instructions that attends to the Nios II processor instruction set rules. Our work shows how we process Java bytecodes to the intermediate code, in the Nios II instructions format, and build the control flow and the control dependence graphs. © 2009 IEEE.
publishDate 2009
dc.date.none.fl_str_mv 2009-11-19
2014-05-27T11:24:02Z
2014-05-27T11:24:02Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/conferenceObject
format conferenceObject
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://dx.doi.org/10.1109/ISCC.2009.5202253
Proceedings - IEEE Symposium on Computers and Communications, p. 104-109.
1530-1346
http://hdl.handle.net/11449/71241
10.1109/ISCC.2009.5202253
WOS:000277119300017
2-s2.0-70449513605
5568681374094860
0000-0001-8248-0826
url http://dx.doi.org/10.1109/ISCC.2009.5202253
http://hdl.handle.net/11449/71241
identifier_str_mv Proceedings - IEEE Symposium on Computers and Communications, p. 104-109.
1530-1346
10.1109/ISCC.2009.5202253
WOS:000277119300017
2-s2.0-70449513605
5568681374094860
0000-0001-8248-0826
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv Proceedings - IEEE Symposium on Computers and Communications
0,193
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv 104-109
dc.source.none.fl_str_mv Scopus
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
_version_ 1808129562066812928

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