A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency

Detalhes bibliográficos
Autor(a) principal: De Lima, J. A. [UNESP]
Data de Publicação: 2001
Tipo de documento: Artigo de conferência
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://dx.doi.org/10.1109/ISCAS.2001.921961
http://hdl.handle.net/11449/66426
Resumo: A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.
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spelling A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiencyComputer simulationEnergy dissipationGain controlLinear integrated circuitsMOSFET devicesNumerical analysisTransconductanceTriodesCurrent efficiencyMultiplying circuitsA low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.Electrical Engineering Dept. Universidade Estadual Paulista, CP 205-CEP 12516-410, GuaratinguetaElectrical Engineering Dept. Universidade Estadual Paulista, CP 205-CEP 12516-410, GuaratinguetaUniversidade Estadual Paulista (Unesp)De Lima, J. A. [UNESP]2014-05-27T11:20:13Z2014-05-27T11:20:13Z2001-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject735-738http://dx.doi.org/10.1109/ISCAS.2001.921961Proceedings - IEEE International Symposium on Circuits and Systems, v. 1, p. 735-738.0271-4310http://hdl.handle.net/11449/6642610.1109/ISCAS.2001.9219612-s2.0-0035017646Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPengProceedings - IEEE International Symposium on Circuits and Systems0,237info:eu-repo/semantics/openAccess2024-07-01T20:12:24Zoai:repositorio.unesp.br:11449/66426Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T17:57:25.414928Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency
title A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency
spellingShingle A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency
De Lima, J. A. [UNESP]
Computer simulation
Energy dissipation
Gain control
Linear integrated circuits
MOSFET devices
Numerical analysis
Transconductance
Triodes
Current efficiency
Multiplying circuits
title_short A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency
title_full A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency
title_fullStr A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency
title_full_unstemmed A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency
title_sort A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency
author De Lima, J. A. [UNESP]
author_facet De Lima, J. A. [UNESP]
author_role author
dc.contributor.none.fl_str_mv Universidade Estadual Paulista (Unesp)
dc.contributor.author.fl_str_mv De Lima, J. A. [UNESP]
dc.subject.por.fl_str_mv Computer simulation
Energy dissipation
Gain control
Linear integrated circuits
MOSFET devices
Numerical analysis
Transconductance
Triodes
Current efficiency
Multiplying circuits
topic Computer simulation
Energy dissipation
Gain control
Linear integrated circuits
MOSFET devices
Numerical analysis
Transconductance
Triodes
Current efficiency
Multiplying circuits
description A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.
publishDate 2001
dc.date.none.fl_str_mv 2001-01-01
2014-05-27T11:20:13Z
2014-05-27T11:20:13Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/conferenceObject
format conferenceObject
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://dx.doi.org/10.1109/ISCAS.2001.921961
Proceedings - IEEE International Symposium on Circuits and Systems, v. 1, p. 735-738.
0271-4310
http://hdl.handle.net/11449/66426
10.1109/ISCAS.2001.921961
2-s2.0-0035017646
url http://dx.doi.org/10.1109/ISCAS.2001.921961
http://hdl.handle.net/11449/66426
identifier_str_mv Proceedings - IEEE International Symposium on Circuits and Systems, v. 1, p. 735-738.
0271-4310
10.1109/ISCAS.2001.921961
2-s2.0-0035017646
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv Proceedings - IEEE International Symposium on Circuits and Systems
0,237
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv 735-738
dc.source.none.fl_str_mv Scopus
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
_version_ 1808128878041890816

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