Common architecture for discrete wavelet transform analysis and synthesis with sequential and constant processing elements

• Autor(a) principal: Cox, Pedro Henrique
• Data de Publicação: 2004
• Outros Autores: Carvalho, Aparecido Augusto de
• Tipo de documento: Artigo de conferência
• Idioma: eng
• Título da fonte: Repositório Institucional da UNESP
• Texto Completo: http://dx.doi.org/10.1109/IMTC.2004.1350991; http://hdl.handle.net/11449/67903
• topic: Discrete Wavelet Transform; FPGA; Signal Analyzer; VHDL; Wavelet signal processing; Discrete wavelet transforms; Signal analyzers; Application specific integrated circuits; Cardiovascular system; CMOS integrated circuits; Computer hardware; Data processing; Field programmable gate arrays; Formal logic; Real time systems; Software prototyping; Ultrasonic waves; Wavelet transforms; Digital signal processing

This paper adresses the problem on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC's and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. Including series memory register banks, one integrated circuit Signal Analyzer, ultrasonic range, is presented.