A low-power silicon-on-insulator PWM discriminator for biomedical applications

Detalhes bibliográficos
Autor(a) principal: Lima, Jader A. de [UNESP]
Data de Publicação: 2000
Outros Autores: Silva, Sidnei F. [UNESP], Cordeiro, Adriano S. [UNESP], Araujo, Alexandro C. [UNESP], Verleysen, Michel [UNESP]
Tipo de documento: Artigo de conferência
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://dx.doi.org/10.1109/ISCAS.2000.857418
http://hdl.handle.net/11449/130712
Resumo: A CMOS/SOI circuit to decode PWM signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a double-integration concept and does not require dc filtering. Nonoverlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mu m single-metal SOI fabrication process and has an effective area of 2mm(2) Typically, the measured resolution of encoding parameter a was better than 10% at 6MHz and V-DD=3.3V. Stand-by consumption is around 340 mu W. Pulses with frequencies up to 15MHz and alpha = 10% can be discriminated for V-DD spanning from 2.3V to 3.3V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.
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spelling A low-power silicon-on-insulator PWM discriminator for biomedical applicationsDigital filtersElectric network analysisElectric network synthesisEnergy utilizationImage analysisImage qualityIntegrated circuit layoutPhase comparatorsPulse width modulationSignal encodingSilicon on insulator technologyBody-implanted neurostimulatorsFast-settling comparatorsCMOS integrated circuitsA CMOS/SOI circuit to decode PWM signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a double-integration concept and does not require dc filtering. Nonoverlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mu m single-metal SOI fabrication process and has an effective area of 2mm(2) Typically, the measured resolution of encoding parameter a was better than 10% at 6MHz and V-DD=3.3V. Stand-by consumption is around 340 mu W. Pulses with frequencies up to 15MHz and alpha = 10% can be discriminated for V-DD spanning from 2.3V to 3.3V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.Univ Estadual Paulista, Dept Elect Engn, BR-12500000 Guaratingueta, SP, BrazilUniv Estadual Paulista, Dept Elect Engn, BR-12500000 Guaratingueta, SP, BrazilInstitute of Electrical and Electronics Engineers (IEEE)Universidade Estadual Paulista (Unesp)Lima, Jader A. de [UNESP]Silva, Sidnei F. [UNESP]Cordeiro, Adriano S. [UNESP]Araujo, Alexandro C. [UNESP]Verleysen, Michel [UNESP]2014-05-20T15:26:46Z2014-05-20T15:26:46Z2000-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject277-280http://dx.doi.org/10.1109/ISCAS.2000.857418Iscas 2000: IEEE International Symposium on Circuits and Systems - Proceedings, Vol V. New York: IEEE, p. 277-280, 2000.0271-4310http://hdl.handle.net/11449/13071210.1109/ISCAS.2000.857418WOS:0000888458000702-s2.0-0033720975Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPengIscas 2000: IEEE International Symposium on Circuits and Systems - Proceedings, Vol V0,237info:eu-repo/semantics/openAccess2024-07-01T20:12:24Zoai:repositorio.unesp.br:11449/130712Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-07-01T20:12:24Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv A low-power silicon-on-insulator PWM discriminator for biomedical applications
title A low-power silicon-on-insulator PWM discriminator for biomedical applications
spellingShingle A low-power silicon-on-insulator PWM discriminator for biomedical applications
Lima, Jader A. de [UNESP]
Digital filters
Electric network analysis
Electric network synthesis
Energy utilization
Image analysis
Image quality
Integrated circuit layout
Phase comparators
Pulse width modulation
Signal encoding
Silicon on insulator technology
Body-implanted neurostimulators
Fast-settling comparators
CMOS integrated circuits
title_short A low-power silicon-on-insulator PWM discriminator for biomedical applications
title_full A low-power silicon-on-insulator PWM discriminator for biomedical applications
title_fullStr A low-power silicon-on-insulator PWM discriminator for biomedical applications
title_full_unstemmed A low-power silicon-on-insulator PWM discriminator for biomedical applications
title_sort A low-power silicon-on-insulator PWM discriminator for biomedical applications
author Lima, Jader A. de [UNESP]
author_facet Lima, Jader A. de [UNESP]
Silva, Sidnei F. [UNESP]
Cordeiro, Adriano S. [UNESP]
Araujo, Alexandro C. [UNESP]
Verleysen, Michel [UNESP]
author_role author
author2 Silva, Sidnei F. [UNESP]
Cordeiro, Adriano S. [UNESP]
Araujo, Alexandro C. [UNESP]
Verleysen, Michel [UNESP]
author2_role author
author
author
author
dc.contributor.none.fl_str_mv Universidade Estadual Paulista (Unesp)
dc.contributor.author.fl_str_mv Lima, Jader A. de [UNESP]
Silva, Sidnei F. [UNESP]
Cordeiro, Adriano S. [UNESP]
Araujo, Alexandro C. [UNESP]
Verleysen, Michel [UNESP]
dc.subject.por.fl_str_mv Digital filters
Electric network analysis
Electric network synthesis
Energy utilization
Image analysis
Image quality
Integrated circuit layout
Phase comparators
Pulse width modulation
Signal encoding
Silicon on insulator technology
Body-implanted neurostimulators
Fast-settling comparators
CMOS integrated circuits
topic Digital filters
Electric network analysis
Electric network synthesis
Energy utilization
Image analysis
Image quality
Integrated circuit layout
Phase comparators
Pulse width modulation
Signal encoding
Silicon on insulator technology
Body-implanted neurostimulators
Fast-settling comparators
CMOS integrated circuits
description A CMOS/SOI circuit to decode PWM signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a double-integration concept and does not require dc filtering. Nonoverlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mu m single-metal SOI fabrication process and has an effective area of 2mm(2) Typically, the measured resolution of encoding parameter a was better than 10% at 6MHz and V-DD=3.3V. Stand-by consumption is around 340 mu W. Pulses with frequencies up to 15MHz and alpha = 10% can be discriminated for V-DD spanning from 2.3V to 3.3V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.
publishDate 2000
dc.date.none.fl_str_mv 2000-01-01
2014-05-20T15:26:46Z
2014-05-20T15:26:46Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/conferenceObject
format conferenceObject
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://dx.doi.org/10.1109/ISCAS.2000.857418
Iscas 2000: IEEE International Symposium on Circuits and Systems - Proceedings, Vol V. New York: IEEE, p. 277-280, 2000.
0271-4310
http://hdl.handle.net/11449/130712
10.1109/ISCAS.2000.857418
WOS:000088845800070
2-s2.0-0033720975
url http://dx.doi.org/10.1109/ISCAS.2000.857418
http://hdl.handle.net/11449/130712
identifier_str_mv Iscas 2000: IEEE International Symposium on Circuits and Systems - Proceedings, Vol V. New York: IEEE, p. 277-280, 2000.
0271-4310
10.1109/ISCAS.2000.857418
WOS:000088845800070
2-s2.0-0033720975
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv Iscas 2000: IEEE International Symposium on Circuits and Systems - Proceedings, Vol V
0,237
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv 277-280
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers (IEEE)
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers (IEEE)
dc.source.none.fl_str_mv Scopus
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
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