Exploring parallelism on pure functional languages with ACQuA

Detalhes bibliográficos
Autor(a) principal: Tanus, Felipe de Oliveira
Data de Publicação: 2017
Tipo de documento: Dissertação
Idioma: eng
Título da fonte: Biblioteca Digital de Teses e Dissertações da UFRGS
Texto Completo: http://hdl.handle.net/10183/184869
Resumo: Moore’s law reaching its physical limitations has pushed the industry to produce multicore processors. However, programming those processors with an imperative language is not easy since it requires developers to create and synchronize threads. A pure functional language is an adequate tool for this task both from the architectural point of view and from the developer’s. We will show that an architecture can benefit from the implicit parallelism present on functional programs and from the lack of side effects making it easier to parallelize. The developer benefits from functional languages from the superior expressiveness of the language to avoid bugs. In this dissertation, we present the ACQuA architecture, a multicore accelerator created to explore parallelism available in function calls from a pure functional program. ACQuA uses hardware support and a specificallytailored memory organization to minimize the overheads of scheduling, communication, and synchronization. Function calls are placed into a queue and are scheduled to different processing units. The processing units are interconnected and exchange results from function applications. In this work we defined a high level model of the accelerator and how to compile a functional program to it. We also simulated the accelerator and evaluated results, such as speedup, memory usage, and communication overhead of the proposed architecture. We defined the necessary traits of a program to achieve a good speedup on the architecture. On the ideal use case, we can increase the speed up at the same rate we increase the number of processing units in the architecture.
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spelling Tanus, Felipe de OliveiraMoreira, Alvaro FreitasNazar, Gabriel Luca2018-11-21T02:42:58Z2017http://hdl.handle.net/10183/184869001081485Moore’s law reaching its physical limitations has pushed the industry to produce multicore processors. However, programming those processors with an imperative language is not easy since it requires developers to create and synchronize threads. A pure functional language is an adequate tool for this task both from the architectural point of view and from the developer’s. We will show that an architecture can benefit from the implicit parallelism present on functional programs and from the lack of side effects making it easier to parallelize. The developer benefits from functional languages from the superior expressiveness of the language to avoid bugs. In this dissertation, we present the ACQuA architecture, a multicore accelerator created to explore parallelism available in function calls from a pure functional program. ACQuA uses hardware support and a specificallytailored memory organization to minimize the overheads of scheduling, communication, and synchronization. Function calls are placed into a queue and are scheduled to different processing units. The processing units are interconnected and exchange results from function applications. In this work we defined a high level model of the accelerator and how to compile a functional program to it. We also simulated the accelerator and evaluated results, such as speedup, memory usage, and communication overhead of the proposed architecture. We defined the necessary traits of a program to achieve a good speedup on the architecture. On the ideal use case, we can increase the speed up at the same rate we increase the number of processing units in the architecture.application/pdfengLinguagens funcionaisProcessamento paraleloArchitectureAcceleratorFunctional programmingParallelismExploring parallelism on pure functional languages with ACQuAExplorando paralelismo em linguagens funcionais puras com ACQuA info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/masterThesisUniversidade Federal do Rio Grande do SulInstituto de InformáticaPrograma de Pós-Graduação em ComputaçãoPorto Alegre, BR-RS2017mestradoinfo:eu-repo/semantics/openAccessreponame:Biblioteca Digital de Teses e Dissertações da UFRGSinstname:Universidade Federal do Rio Grande do Sul (UFRGS)instacron:UFRGSTEXT001081485.pdf.txt001081485.pdf.txtExtracted Texttext/plain94333http://www.lume.ufrgs.br/bitstream/10183/184869/2/001081485.pdf.txt786d3260172a1aba400ca5357a8b335fMD52ORIGINAL001081485.pdfTexto completo (inglês)application/pdf406049http://www.lume.ufrgs.br/bitstream/10183/184869/1/001081485.pdf5606c4b96fba7aac50702b851bc68b15MD5110183/1848692021-05-26 04:44:47.109182oai:www.lume.ufrgs.br:10183/184869Biblioteca Digital de Teses e Dissertaçõeshttps://lume.ufrgs.br/handle/10183/2PUBhttps://lume.ufrgs.br/oai/requestlume@ufrgs.br||lume@ufrgs.bropendoar:18532021-05-26T07:44:47Biblioteca Digital de Teses e Dissertações da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS)false
dc.title.pt_BR.fl_str_mv Exploring parallelism on pure functional languages with ACQuA
dc.title.alternative.pt.fl_str_mv Explorando paralelismo em linguagens funcionais puras com ACQuA
title Exploring parallelism on pure functional languages with ACQuA
spellingShingle Exploring parallelism on pure functional languages with ACQuA
Tanus, Felipe de Oliveira
Linguagens funcionais
Processamento paralelo
Architecture
Accelerator
Functional programming
Parallelism
title_short Exploring parallelism on pure functional languages with ACQuA
title_full Exploring parallelism on pure functional languages with ACQuA
title_fullStr Exploring parallelism on pure functional languages with ACQuA
title_full_unstemmed Exploring parallelism on pure functional languages with ACQuA
title_sort Exploring parallelism on pure functional languages with ACQuA
author Tanus, Felipe de Oliveira
author_facet Tanus, Felipe de Oliveira
author_role author
dc.contributor.author.fl_str_mv Tanus, Felipe de Oliveira
dc.contributor.advisor1.fl_str_mv Moreira, Alvaro Freitas
dc.contributor.advisor-co1.fl_str_mv Nazar, Gabriel Luca
contributor_str_mv Moreira, Alvaro Freitas
Nazar, Gabriel Luca
dc.subject.por.fl_str_mv Linguagens funcionais
Processamento paralelo
topic Linguagens funcionais
Processamento paralelo
Architecture
Accelerator
Functional programming
Parallelism
dc.subject.eng.fl_str_mv Architecture
Accelerator
Functional programming
Parallelism
description Moore’s law reaching its physical limitations has pushed the industry to produce multicore processors. However, programming those processors with an imperative language is not easy since it requires developers to create and synchronize threads. A pure functional language is an adequate tool for this task both from the architectural point of view and from the developer’s. We will show that an architecture can benefit from the implicit parallelism present on functional programs and from the lack of side effects making it easier to parallelize. The developer benefits from functional languages from the superior expressiveness of the language to avoid bugs. In this dissertation, we present the ACQuA architecture, a multicore accelerator created to explore parallelism available in function calls from a pure functional program. ACQuA uses hardware support and a specificallytailored memory organization to minimize the overheads of scheduling, communication, and synchronization. Function calls are placed into a queue and are scheduled to different processing units. The processing units are interconnected and exchange results from function applications. In this work we defined a high level model of the accelerator and how to compile a functional program to it. We also simulated the accelerator and evaluated results, such as speedup, memory usage, and communication overhead of the proposed architecture. We defined the necessary traits of a program to achieve a good speedup on the architecture. On the ideal use case, we can increase the speed up at the same rate we increase the number of processing units in the architecture.
publishDate 2017
dc.date.issued.fl_str_mv 2017
dc.date.accessioned.fl_str_mv 2018-11-21T02:42:58Z
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