RV-Across: an associative processing simulator
Autor(a) principal: | |
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Data de Publicação: | 2020 |
Outros Autores: | , , |
Tipo de documento: | Artigo de conferência |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UTFPR (da Universidade Tecnológica Federal do Paraná (RIUT)) |
Texto Completo: | http://repositorio.utfpr.edu.br/jspui/handle/1/29753 https://doi.org/10.5753/wscad.2020.14064 |
Resumo: | Associative Processing provides high-performance and energyefficient parallel computation using a Content-Addressable Memory (CAM). Emerging big data applications can be significantly sped-up by Associative Processing, but validation and evaluation are key challenges. We present RVAcross, a RISC-V Associative Processing Simulator for testing, validation, and modeling associative operations. RV-Across eases the design of associative and near-memory processing architectures by offering interfaces to both building new operations and providing high-level experimentation. Our simulator records memory and registers states of each associative operation pass, giving the user visibility and control over the simulation. The user can employ the simulation statistics provided by RV-Across to compute performance and energy metrics. RV-Across implements common associative operations and provides a framework to allow for easy extension. We show how the simulator works by experimenting with different scenarios for associative operations with three applications that test the functionality of logic and arithmetic computations: matrix multiply, checksum, and bitcount. Our results highlight the direct relation between the data length and potential performance improvement of associative processing in comparison to regular CPU serial and parallel operation. In case of matrix multiplication, the speed-up increases linearly with matrices dimension, achieving 8X for 200x200 bytes matrices and overcoming parallel execution in an 8-core CPU. |
id |
UTFPR-12_70c0051e770069ed09ba1c98a12c7111 |
---|---|
oai_identifier_str |
oai:repositorio.utfpr.edu.br:1/29753 |
network_acronym_str |
UTFPR-12 |
network_name_str |
Repositório Institucional da UTFPR (da Universidade Tecnológica Federal do Paraná (RIUT)) |
repository_id_str |
|
spelling |
2022-09-27T14:29:53Z2022-09-27T14:29:53Z2020-10-21SILVEIRA, Jonathas; FELZMANN, Isaías; FABRÍCIO FILHO, João; WANNER, Lucas. RV-Across: an associative processing simulator. In: SIMPÓSIO EM SISTEMAS COMPUTACIONAIS DE ALTO DESEMPENHO, 21., 2020. Anais eletrônicos [...]. Porto Alegre: Sociedade Brasileira de Computação, 2020. p. 131-142. DOI: https://doi.org/10.5753/wscad.2020.14064. Disponível em: https://sol.sbc.org.br/index.php/wscad/article/view/14064/13912. Acesso em: 28 jun. 2022.http://repositorio.utfpr.edu.br/jspui/handle/1/29753https://doi.org/10.5753/wscad.2020.14064Associative Processing provides high-performance and energyefficient parallel computation using a Content-Addressable Memory (CAM). Emerging big data applications can be significantly sped-up by Associative Processing, but validation and evaluation are key challenges. We present RVAcross, a RISC-V Associative Processing Simulator for testing, validation, and modeling associative operations. RV-Across eases the design of associative and near-memory processing architectures by offering interfaces to both building new operations and providing high-level experimentation. Our simulator records memory and registers states of each associative operation pass, giving the user visibility and control over the simulation. The user can employ the simulation statistics provided by RV-Across to compute performance and energy metrics. RV-Across implements common associative operations and provides a framework to allow for easy extension. We show how the simulator works by experimenting with different scenarios for associative operations with three applications that test the functionality of logic and arithmetic computations: matrix multiply, checksum, and bitcount. Our results highlight the direct relation between the data length and potential performance improvement of associative processing in comparison to regular CPU serial and parallel operation. In case of matrix multiplication, the speed-up increases linearly with matrices dimension, achieving 8X for 200x200 bytes matrices and overcoming parallel execution in an 8-core CPU.engSimpósio em Sistemas Computacionais de Alto Desempenhohttps://sol.sbc.org.br/index.php/wscad/article/view/14064/13912http://creativecommons.org/licenses/by-nc/4.0/info:eu-repo/semantics/openAccessCNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAOSimulação (Computadores)Sistemas de memória de computadoresInterfaces de usuário (Sistemas de computação)Computer simulationComputer storage devicesUser interfaces (Computer systems)RV-Across: an associative processing simulatorinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObjectCampo MouraoBrasil21Silveira, Jonathas Evangelista daFelzmann, Isaías BittencoutFabrício Filho, JoãoWanner, Lucas Franciscoreponame:Repositório Institucional da UTFPR (da Universidade Tecnológica Federal do Paraná (RIUT))instname:Universidade Tecnológica Federal do Paraná (UTFPR)instacron:UTFPRORIGINALrvacrossassociativeprocessingsimulator.pdfrvacrossassociativeprocessingsimulator.pdfapplication/pdf361316http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/1/rvacrossassociativeprocessingsimulator.pdf8ba0387d353d9750bbca3f9b8b19f5ccMD51LICENSElicense.txtlicense.txttext/plain; charset=utf-81290http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/3/license.txtb9d82215ab23456fa2d8b49c5df1b95bMD53CC-LICENSElicense_rdflicense_rdfapplication/rdf+xml; charset=utf-8914http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/2/license_rdf24013099e9e6abb1575dc6ce0855efd5MD52TEXTrvacrossassociativeprocessingsimulator.pdf.txtrvacrossassociativeprocessingsimulator.pdf.txtExtracted texttext/plain36947http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/4/rvacrossassociativeprocessingsimulator.pdf.txt07442768d2e49031f7360c7b03e1af0dMD54THUMBNAILrvacrossassociativeprocessingsimulator.pdf.jpgrvacrossassociativeprocessingsimulator.pdf.jpgGenerated Thumbnailimage/jpeg1574http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/5/rvacrossassociativeprocessingsimulator.pdf.jpgdcfdbfac1e6d6a08f666571655a93d1eMD551/297532022-09-28 03:07:12.324oai:repositorio.utfpr.edu.br:1/29753TmEgcXVhbGlkYWRlIGRlIHRpdHVsYXIgZG9zIGRpcmVpdG9zIGRlIGF1dG9yIGRhIHB1YmxpY2HDp8OjbywgYXV0b3Jpem8gYSBVVEZQUiBhIHZlaWN1bGFyLCAKYXRyYXbDqXMgZG8gUG9ydGFsIGRlIEluZm9ybWHDp8OjbyBlbSBBY2Vzc28gQWJlcnRvIChQSUFBKSBlIGRvcyBDYXTDoWxvZ29zIGRhcyBCaWJsaW90ZWNhcyAKZGVzdGEgSW5zdGl0dWnDp8Ojbywgc2VtIHJlc3NhcmNpbWVudG8gZG9zIGRpcmVpdG9zIGF1dG9yYWlzLCBkZSBhY29yZG8gY29tIGEgTGVpIG5vIDkuNjEwLzk4LCAKbyB0ZXh0byBkZXN0YSBvYnJhLCBvYnNlcnZhbmRvIGFzIGNvbmRpw6fDtWVzIGRlIGRpc3BvbmliaWxpemHDp8OjbyByZWdpc3RyYWRhcyBubyBpdGVtIDQgZG8gCuKAnFRlcm1vIGRlIEF1dG9yaXphw6fDo28gcGFyYSBQdWJsaWNhw6fDo28gZGUgVHJhYmFsaG9zIGRlIENvbmNsdXPDo28gZGUgQ3Vyc28gZGUgR3JhZHVhw6fDo28gZSAKRXNwZWNpYWxpemHDp8OjbywgRGlzc2VydGHDp8O1ZXMgZSBUZXNlcyBubyBQb3J0YWwgZGUgSW5mb3JtYcOnw6NvIGUgbm9zIENhdMOhbG9nb3MgRWxldHLDtG5pY29zIGRvIApTaXN0ZW1hIGRlIEJpYmxpb3RlY2FzIGRhIFVURlBS4oCdLCBwYXJhIGZpbnMgZGUgbGVpdHVyYSwgaW1wcmVzc8OjbyBlL291IGRvd25sb2FkLCB2aXNhbmRvIGEgCmRpdnVsZ2HDp8OjbyBkYSBwcm9kdcOnw6NvIGNpZW50w61maWNhIGJyYXNpbGVpcmEuCgogIEFzIHZpYXMgb3JpZ2luYWlzIGUgYXNzaW5hZGFzIHBlbG8ocykgYXV0b3IoZXMpIGRvIOKAnFRlcm1vIGRlIEF1dG9yaXphw6fDo28gcGFyYSBQdWJsaWNhw6fDo28gZGUgClRyYWJhbGhvcyBkZSBDb25jbHVzw6NvIGRlIEN1cnNvIGRlIEdyYWR1YcOnw6NvIGUgRXNwZWNpYWxpemHDp8OjbywgRGlzc2VydGHDp8O1ZXMgZSBUZXNlcyBubyBQb3J0YWwgCmRlIEluZm9ybWHDp8OjbyBlIG5vcyBDYXTDoWxvZ29zIEVsZXRyw7RuaWNvcyBkbyBTaXN0ZW1hIGRlIEJpYmxpb3RlY2FzIGRhIFVURlBS4oCdIGUgZGEg4oCcRGVjbGFyYcOnw6NvIApkZSBBdXRvcmlh4oCdIGVuY29udHJhbS1zZSBhcnF1aXZhZGFzIG5hIEJpYmxpb3RlY2EgZG8gQ8OibXB1cyBubyBxdWFsIG8gdHJhYmFsaG8gZm9pIGRlZmVuZGlkby4gCk5vIGNhc28gZGUgcHVibGljYcOnw7VlcyBkZSBhdXRvcmlhIGNvbGV0aXZhIGUgbXVsdGljw6JtcHVzLCBvcyBkb2N1bWVudG9zIGZpY2Fyw6NvIHNvYiBndWFyZGEgZGEgCkJpYmxpb3RlY2EgY29tIGEgcXVhbCBvIOKAnHByaW1laXJvIGF1dG9y4oCdIHBvc3N1YSB2w61uY3Vsby4KRepositório de PublicaçõesPUBhttp://repositorio.utfpr.edu.br:8080/oai/requestopendoar:2022-09-28T06:07:12Repositório Institucional da UTFPR (da Universidade Tecnológica Federal do Paraná (RIUT)) - Universidade Tecnológica Federal do Paraná (UTFPR)false |
dc.title.pt_BR.fl_str_mv |
RV-Across: an associative processing simulator |
title |
RV-Across: an associative processing simulator |
spellingShingle |
RV-Across: an associative processing simulator Silveira, Jonathas Evangelista da CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO Simulação (Computadores) Sistemas de memória de computadores Interfaces de usuário (Sistemas de computação) Computer simulation Computer storage devices User interfaces (Computer systems) |
title_short |
RV-Across: an associative processing simulator |
title_full |
RV-Across: an associative processing simulator |
title_fullStr |
RV-Across: an associative processing simulator |
title_full_unstemmed |
RV-Across: an associative processing simulator |
title_sort |
RV-Across: an associative processing simulator |
author |
Silveira, Jonathas Evangelista da |
author_facet |
Silveira, Jonathas Evangelista da Felzmann, Isaías Bittencout Fabrício Filho, João Wanner, Lucas Francisco |
author_role |
author |
author2 |
Felzmann, Isaías Bittencout Fabrício Filho, João Wanner, Lucas Francisco |
author2_role |
author author author |
dc.contributor.author.fl_str_mv |
Silveira, Jonathas Evangelista da Felzmann, Isaías Bittencout Fabrício Filho, João Wanner, Lucas Francisco |
dc.subject.cnpq.fl_str_mv |
CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO |
topic |
CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO Simulação (Computadores) Sistemas de memória de computadores Interfaces de usuário (Sistemas de computação) Computer simulation Computer storage devices User interfaces (Computer systems) |
dc.subject.por.fl_str_mv |
Simulação (Computadores) Sistemas de memória de computadores Interfaces de usuário (Sistemas de computação) Computer simulation Computer storage devices User interfaces (Computer systems) |
description |
Associative Processing provides high-performance and energyefficient parallel computation using a Content-Addressable Memory (CAM). Emerging big data applications can be significantly sped-up by Associative Processing, but validation and evaluation are key challenges. We present RVAcross, a RISC-V Associative Processing Simulator for testing, validation, and modeling associative operations. RV-Across eases the design of associative and near-memory processing architectures by offering interfaces to both building new operations and providing high-level experimentation. Our simulator records memory and registers states of each associative operation pass, giving the user visibility and control over the simulation. The user can employ the simulation statistics provided by RV-Across to compute performance and energy metrics. RV-Across implements common associative operations and provides a framework to allow for easy extension. We show how the simulator works by experimenting with different scenarios for associative operations with three applications that test the functionality of logic and arithmetic computations: matrix multiply, checksum, and bitcount. Our results highlight the direct relation between the data length and potential performance improvement of associative processing in comparison to regular CPU serial and parallel operation. In case of matrix multiplication, the speed-up increases linearly with matrices dimension, achieving 8X for 200x200 bytes matrices and overcoming parallel execution in an 8-core CPU. |
publishDate |
2020 |
dc.date.issued.fl_str_mv |
2020-10-21 |
dc.date.accessioned.fl_str_mv |
2022-09-27T14:29:53Z |
dc.date.available.fl_str_mv |
2022-09-27T14:29:53Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/conferenceObject |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.citation.fl_str_mv |
SILVEIRA, Jonathas; FELZMANN, Isaías; FABRÍCIO FILHO, João; WANNER, Lucas. RV-Across: an associative processing simulator. In: SIMPÓSIO EM SISTEMAS COMPUTACIONAIS DE ALTO DESEMPENHO, 21., 2020. Anais eletrônicos [...]. Porto Alegre: Sociedade Brasileira de Computação, 2020. p. 131-142. DOI: https://doi.org/10.5753/wscad.2020.14064. Disponível em: https://sol.sbc.org.br/index.php/wscad/article/view/14064/13912. Acesso em: 28 jun. 2022. |
dc.identifier.uri.fl_str_mv |
http://repositorio.utfpr.edu.br/jspui/handle/1/29753 |
dc.identifier.doi.pt_BR.fl_str_mv |
https://doi.org/10.5753/wscad.2020.14064 |
identifier_str_mv |
SILVEIRA, Jonathas; FELZMANN, Isaías; FABRÍCIO FILHO, João; WANNER, Lucas. RV-Across: an associative processing simulator. In: SIMPÓSIO EM SISTEMAS COMPUTACIONAIS DE ALTO DESEMPENHO, 21., 2020. Anais eletrônicos [...]. Porto Alegre: Sociedade Brasileira de Computação, 2020. p. 131-142. DOI: https://doi.org/10.5753/wscad.2020.14064. Disponível em: https://sol.sbc.org.br/index.php/wscad/article/view/14064/13912. Acesso em: 28 jun. 2022. |
url |
http://repositorio.utfpr.edu.br/jspui/handle/1/29753 https://doi.org/10.5753/wscad.2020.14064 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.ispartof.pt_BR.fl_str_mv |
Simpósio em Sistemas Computacionais de Alto Desempenho |
dc.relation.uri.pt_BR.fl_str_mv |
https://sol.sbc.org.br/index.php/wscad/article/view/14064/13912 |
dc.rights.driver.fl_str_mv |
http://creativecommons.org/licenses/by-nc/4.0/ info:eu-repo/semantics/openAccess |
rights_invalid_str_mv |
http://creativecommons.org/licenses/by-nc/4.0/ |
eu_rights_str_mv |
openAccess |
dc.publisher.none.fl_str_mv |
Campo Mourao |
dc.publisher.country.fl_str_mv |
Brasil |
publisher.none.fl_str_mv |
Campo Mourao |
dc.source.none.fl_str_mv |
reponame:Repositório Institucional da UTFPR (da Universidade Tecnológica Federal do Paraná (RIUT)) instname:Universidade Tecnológica Federal do Paraná (UTFPR) instacron:UTFPR |
instname_str |
Universidade Tecnológica Federal do Paraná (UTFPR) |
instacron_str |
UTFPR |
institution |
UTFPR |
reponame_str |
Repositório Institucional da UTFPR (da Universidade Tecnológica Federal do Paraná (RIUT)) |
collection |
Repositório Institucional da UTFPR (da Universidade Tecnológica Federal do Paraná (RIUT)) |
bitstream.url.fl_str_mv |
http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/1/rvacrossassociativeprocessingsimulator.pdf http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/3/license.txt http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/2/license_rdf http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/4/rvacrossassociativeprocessingsimulator.pdf.txt http://repositorio.utfpr.edu.br:8080/jspui/bitstream/1/29753/5/rvacrossassociativeprocessingsimulator.pdf.jpg |
bitstream.checksum.fl_str_mv |
8ba0387d353d9750bbca3f9b8b19f5cc b9d82215ab23456fa2d8b49c5df1b95b 24013099e9e6abb1575dc6ce0855efd5 07442768d2e49031f7360c7b03e1af0d dcfdbfac1e6d6a08f666571655a93d1e |
bitstream.checksumAlgorithm.fl_str_mv |
MD5 MD5 MD5 MD5 MD5 |
repository.name.fl_str_mv |
Repositório Institucional da UTFPR (da Universidade Tecnológica Federal do Paraná (RIUT)) - Universidade Tecnológica Federal do Paraná (UTFPR) |
repository.mail.fl_str_mv |
|
_version_ |
1805923006646583296 |