A hardware DC motor emulator
Autor(a) principal: | |
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Data de Publicação: | 2010 |
Outros Autores: | , , |
Tipo de documento: | Artigo |
Idioma: | por |
Título da fonte: | Vetor (Online) |
Texto Completo: | https://periodicos.furg.br/vetor/article/view/1678 |
Resumo: | Much work have been done lately to develop complex motor control systems. However they always rely on a physical drive/motor/encoder setup for experimental results. This paper presents a hardware DC motor emulator that can be synthesized to FPGAs. The emulator is intended to replace an actual DC motor during the development phase of motor controllers. A torque based input is required and incremental encoder output is provided, so this model can replace both the DC motor, and its power driver without modifications to the motor control system. The proposed emulator is able to reach a clock frequency of hundreds of megahertz and uses very few logic resources in current FPGA technologies. The hardware can be parameterized at synthesis time to make the model suitable for specific needs. |
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A hardware DC motor emulatorDC MOTOREmulatorFPGAHardwareMuch work have been done lately to develop complex motor control systems. However they always rely on a physical drive/motor/encoder setup for experimental results. This paper presents a hardware DC motor emulator that can be synthesized to FPGAs. The emulator is intended to replace an actual DC motor during the development phase of motor controllers. A torque based input is required and incremental encoder output is provided, so this model can replace both the DC motor, and its power driver without modifications to the motor control system. The proposed emulator is able to reach a clock frequency of hundreds of megahertz and uses very few logic resources in current FPGA technologies. The hardware can be parameterized at synthesis time to make the model suitable for specific needs.Universidade Federal do Rio Grande2010-12-06info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionapplication/pdfhttps://periodicos.furg.br/vetor/article/view/1678VETOR - Journal of Exact Sciences and Engineering; Vol. 18 No. 1 (2008); 5-16VETOR - Revista de Ciências Exatas e Engenharias; v. 18 n. 1 (2008); 5-162358-34520102-7352reponame:Vetor (Online)instname:Universidade Federal do Rio Grande (FURG)instacron:FURGporhttps://periodicos.furg.br/vetor/article/view/1678/818Copyright (c) 2014 VETOR - Revista de Ciências Exatas e Engenhariasinfo:eu-repo/semantics/openAccessRosa, Vagner S.Gervini, Vitor IrigonGomes, Sebastião C. P.Bampi, Sergio2023-03-22T15:42:39Zoai:periodicos.furg.br:article/1678Revistahttps://periodicos.furg.br/vetorPUBhttps://periodicos.furg.br/vetor/oaigmplatt@furg.br2358-34520102-7352opendoar:2023-03-22T15:42:39Vetor (Online) - Universidade Federal do Rio Grande (FURG)false |
dc.title.none.fl_str_mv |
A hardware DC motor emulator |
title |
A hardware DC motor emulator |
spellingShingle |
A hardware DC motor emulator Rosa, Vagner S. DC MOTOR Emulator FPGA Hardware |
title_short |
A hardware DC motor emulator |
title_full |
A hardware DC motor emulator |
title_fullStr |
A hardware DC motor emulator |
title_full_unstemmed |
A hardware DC motor emulator |
title_sort |
A hardware DC motor emulator |
author |
Rosa, Vagner S. |
author_facet |
Rosa, Vagner S. Gervini, Vitor Irigon Gomes, Sebastião C. P. Bampi, Sergio |
author_role |
author |
author2 |
Gervini, Vitor Irigon Gomes, Sebastião C. P. Bampi, Sergio |
author2_role |
author author author |
dc.contributor.author.fl_str_mv |
Rosa, Vagner S. Gervini, Vitor Irigon Gomes, Sebastião C. P. Bampi, Sergio |
dc.subject.por.fl_str_mv |
DC MOTOR Emulator FPGA Hardware |
topic |
DC MOTOR Emulator FPGA Hardware |
description |
Much work have been done lately to develop complex motor control systems. However they always rely on a physical drive/motor/encoder setup for experimental results. This paper presents a hardware DC motor emulator that can be synthesized to FPGAs. The emulator is intended to replace an actual DC motor during the development phase of motor controllers. A torque based input is required and incremental encoder output is provided, so this model can replace both the DC motor, and its power driver without modifications to the motor control system. The proposed emulator is able to reach a clock frequency of hundreds of megahertz and uses very few logic resources in current FPGA technologies. The hardware can be parameterized at synthesis time to make the model suitable for specific needs. |
publishDate |
2010 |
dc.date.none.fl_str_mv |
2010-12-06 |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article info:eu-repo/semantics/publishedVersion |
format |
article |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
https://periodicos.furg.br/vetor/article/view/1678 |
url |
https://periodicos.furg.br/vetor/article/view/1678 |
dc.language.iso.fl_str_mv |
por |
language |
por |
dc.relation.none.fl_str_mv |
https://periodicos.furg.br/vetor/article/view/1678/818 |
dc.rights.driver.fl_str_mv |
Copyright (c) 2014 VETOR - Revista de Ciências Exatas e Engenharias info:eu-repo/semantics/openAccess |
rights_invalid_str_mv |
Copyright (c) 2014 VETOR - Revista de Ciências Exatas e Engenharias |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
application/pdf |
dc.publisher.none.fl_str_mv |
Universidade Federal do Rio Grande |
publisher.none.fl_str_mv |
Universidade Federal do Rio Grande |
dc.source.none.fl_str_mv |
VETOR - Journal of Exact Sciences and Engineering; Vol. 18 No. 1 (2008); 5-16 VETOR - Revista de Ciências Exatas e Engenharias; v. 18 n. 1 (2008); 5-16 2358-3452 0102-7352 reponame:Vetor (Online) instname:Universidade Federal do Rio Grande (FURG) instacron:FURG |
instname_str |
Universidade Federal do Rio Grande (FURG) |
instacron_str |
FURG |
institution |
FURG |
reponame_str |
Vetor (Online) |
collection |
Vetor (Online) |
repository.name.fl_str_mv |
Vetor (Online) - Universidade Federal do Rio Grande (FURG) |
repository.mail.fl_str_mv |
gmplatt@furg.br |
_version_ |
1797041761173897216 |