DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs

Detalhes bibliográficos
Autor(a) principal: Gericota, Manuel G.
Data de Publicação: 2001
Outros Autores: Alves, Gustavo R., Silva, Miguel L., Ferreira, J. M. Martins
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: http://hdl.handle.net/10400.22/9716
Resumo: A new class of FPGAs that enable partial and dynamic reconfiguration without disturbing system operation, raised a new test challenge: how to assure a continuously fault free operation, independently of the circuit present after many reconfiguration processes. A new on-line test method for those FPGAs is proposed, based on a scanning methodology and in the reuse of the IEEE 1149.1 Boundary Scan test infrastructure, already widely employed for In-System Programming.
id RCAP_24427c7be8fc33840162a4e4a8111244
oai_identifier_str oai:recipp.ipp.pt:10400.22/9716
network_acronym_str RCAP
network_name_str Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
repository_id_str 7160
spelling DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAsFPGAsA new class of FPGAs that enable partial and dynamic reconfiguration without disturbing system operation, raised a new test challenge: how to assure a continuously fault free operation, independently of the circuit present after many reconfiguration processes. A new on-line test method for those FPGAs is proposed, based on a scanning methodology and in the reuse of the IEEE 1149.1 Boundary Scan test infrastructure, already widely employed for In-System Programming.Repositório Científico do Instituto Politécnico do PortoGericota, Manuel G.Alves, Gustavo R.Silva, Miguel L.Ferreira, J. M. Martins2017-03-28T14:18:05Z2001-052001-05-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10400.22/9716enginfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-03-13T12:51:12Zoai:recipp.ipp.pt:10400.22/9716Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T17:30:15.755648Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
title DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
spellingShingle DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
Gericota, Manuel G.
FPGAs
title_short DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
title_full DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
title_fullStr DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
title_full_unstemmed DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
title_sort DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
author Gericota, Manuel G.
author_facet Gericota, Manuel G.
Alves, Gustavo R.
Silva, Miguel L.
Ferreira, J. M. Martins
author_role author
author2 Alves, Gustavo R.
Silva, Miguel L.
Ferreira, J. M. Martins
author2_role author
author
author
dc.contributor.none.fl_str_mv Repositório Científico do Instituto Politécnico do Porto
dc.contributor.author.fl_str_mv Gericota, Manuel G.
Alves, Gustavo R.
Silva, Miguel L.
Ferreira, J. M. Martins
dc.subject.por.fl_str_mv FPGAs
topic FPGAs
description A new class of FPGAs that enable partial and dynamic reconfiguration without disturbing system operation, raised a new test challenge: how to assure a continuously fault free operation, independently of the circuit present after many reconfiguration processes. A new on-line test method for those FPGAs is proposed, based on a scanning methodology and in the reuse of the IEEE 1149.1 Boundary Scan test infrastructure, already widely employed for In-System Programming.
publishDate 2001
dc.date.none.fl_str_mv 2001-05
2001-05-01T00:00:00Z
2017-03-28T14:18:05Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
format article
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://hdl.handle.net/10400.22/9716
url http://hdl.handle.net/10400.22/9716
dc.language.iso.fl_str_mv eng
language eng
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
instacron:RCAAP
instname_str Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
instacron_str RCAAP
institution RCAAP
reponame_str Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
collection Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
repository.name.fl_str_mv Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
repository.mail.fl_str_mv
_version_ 1799131398817185792

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