A framework for fault tolerant real time systems based on reconfigurable FPGAs

Detalhes bibliográficos
Autor(a) principal: José M. Ferreira
Data de Publicação: 2006
Outros Autores: Manuel G. Gericota, Luís F. Lemos, Gustavo R. Alves, Mário M. Barbosa
Tipo de documento: Livro
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: https://repositorio-aberto.up.pt/handle/10216/84054
Resumo: To increase the amount of logic available to the usersin SRAM-based FPGAs, manufacturers are usingnanometric technologies to boost logic density andreduce costs, making its use more attractive. However,these technological improvements also make FPGAsparticularly vulnerable to configuration memory bit-flipscaused by power fluctuations, strong electromagneticfields and radiation. This issue is particularly sensitivebecause of the increasing amount of configurationmemory cells needed to define their functionality.A short survey of the most recent publications ispresented to support the options assumed during thedefinition of a framework for implementing circuitsimmune to bit-flips induction mechanisms in memorycells, based on a customized redundant infrastructureand on a detection-and-fix controller.
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spelling A framework for fault tolerant real time systems based on reconfigurable FPGAsEngenharia electrotécnica, Engenharia electrotécnica, electrónica e informáticaElectrical engineering, Electrical engineering, Electronic engineering, Information engineeringTo increase the amount of logic available to the usersin SRAM-based FPGAs, manufacturers are usingnanometric technologies to boost logic density andreduce costs, making its use more attractive. However,these technological improvements also make FPGAsparticularly vulnerable to configuration memory bit-flipscaused by power fluctuations, strong electromagneticfields and radiation. This issue is particularly sensitivebecause of the increasing amount of configurationmemory cells needed to define their functionality.A short survey of the most recent publications ispresented to support the options assumed during thedefinition of a framework for implementing circuitsimmune to bit-flips induction mechanisms in memorycells, based on a customized redundant infrastructureand on a detection-and-fix controller.2006-092006-09-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/bookapplication/pdfhttps://repositorio-aberto.up.pt/handle/10216/84054eng10.1109/ETFA.2006.355409José M. FerreiraManuel G. GericotaLuís F. LemosGustavo R. AlvesMário M. Barbosainfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-11-29T15:57:10Zoai:repositorio-aberto.up.pt:10216/84054Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-20T00:35:44.045220Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv A framework for fault tolerant real time systems based on reconfigurable FPGAs
title A framework for fault tolerant real time systems based on reconfigurable FPGAs
spellingShingle A framework for fault tolerant real time systems based on reconfigurable FPGAs
José M. Ferreira
Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
title_short A framework for fault tolerant real time systems based on reconfigurable FPGAs
title_full A framework for fault tolerant real time systems based on reconfigurable FPGAs
title_fullStr A framework for fault tolerant real time systems based on reconfigurable FPGAs
title_full_unstemmed A framework for fault tolerant real time systems based on reconfigurable FPGAs
title_sort A framework for fault tolerant real time systems based on reconfigurable FPGAs
author José M. Ferreira
author_facet José M. Ferreira
Manuel G. Gericota
Luís F. Lemos
Gustavo R. Alves
Mário M. Barbosa
author_role author
author2 Manuel G. Gericota
Luís F. Lemos
Gustavo R. Alves
Mário M. Barbosa
author2_role author
author
author
author
dc.contributor.author.fl_str_mv José M. Ferreira
Manuel G. Gericota
Luís F. Lemos
Gustavo R. Alves
Mário M. Barbosa
dc.subject.por.fl_str_mv Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
topic Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
description To increase the amount of logic available to the usersin SRAM-based FPGAs, manufacturers are usingnanometric technologies to boost logic density andreduce costs, making its use more attractive. However,these technological improvements also make FPGAsparticularly vulnerable to configuration memory bit-flipscaused by power fluctuations, strong electromagneticfields and radiation. This issue is particularly sensitivebecause of the increasing amount of configurationmemory cells needed to define their functionality.A short survey of the most recent publications ispresented to support the options assumed during thedefinition of a framework for implementing circuitsimmune to bit-flips induction mechanisms in memorycells, based on a customized redundant infrastructureand on a detection-and-fix controller.
publishDate 2006
dc.date.none.fl_str_mv 2006-09
2006-09-01T00:00:00Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/book
format book
status_str publishedVersion
dc.identifier.uri.fl_str_mv https://repositorio-aberto.up.pt/handle/10216/84054
url https://repositorio-aberto.up.pt/handle/10216/84054
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 10.1109/ETFA.2006.355409
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
instacron:RCAAP
instname_str Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
instacron_str RCAAP
institution RCAAP
reponame_str Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
collection Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
repository.name.fl_str_mv Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
repository.mail.fl_str_mv
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