Dynamically Rotate And Free for Test: The Path for FPGA Concurrent Test

• Autor(a) principal: Gericota, Manuel G.
• Data de Publicação: 2001
• Outros Autores: Alves, Gustavo R., Ferreira, J. M. Martins
• Tipo de documento: Artigo
• Idioma: eng
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: http://hdl.handle.net/10400.22/9715
• topic: FPGAs

Dynamically reconfigurable systems have benefited from a new class of FPGAs, recently introduced into the market, that enables partial and dynamic reconfiguration. While enabling concurrent reconfiguration without disturbing system operation, this technology also raises a new test challenge: to assure a continuously fault free operation independently of the circuit present after the reconfiguration process. A new structural concurrent test method, recently proposed by the authors and based in the principle of replicating and freeing the resources to be tested, raised several questions, one of them being: What strategy to follow in the process of dynamically replicate and free those resources? This paper presents a strategy on how to free the resources to be tested and the results of a series of simulation experiments made with the objective of finding the best methodology to achieve it.