Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range

Detalhes bibliográficos
Autor(a) principal: Miguens Matutino, Pedro
Data de Publicação: 2015
Outros Autores: Chaves, Ricardo, Sousa, Leonel
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: http://hdl.handle.net/10400.21/5740
Resumo: In this brief, a read-only-memoryless structure for binary-to-residue number system (RNS) conversion modulo {2(n) +/- k} is proposed. This structure is based only on adders and constant multipliers. This brief is motivated by the existing {2(n) +/- k} binary-to-RNS converters, which are particular inefficient for larger values of n. The experimental results obtained for 4n and 8n bits of dynamic range suggest that the proposed conversion structures are able to significantly improve the forward conversion efficiency, with an AT metric improvement above 100%, regarding the related state of the art. Delay improvements of 2.17 times with only 5% area increase can be achieved if a proper selection of the {2(n) +/- k} moduli is performed.
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spelling Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic rangeArithmeticBinary-to-RNSForward conversionResidue number systemsIn this brief, a read-only-memoryless structure for binary-to-residue number system (RNS) conversion modulo {2(n) +/- k} is proposed. This structure is based only on adders and constant multipliers. This brief is motivated by the existing {2(n) +/- k} binary-to-RNS converters, which are particular inefficient for larger values of n. The experimental results obtained for 4n and 8n bits of dynamic range suggest that the proposed conversion structures are able to significantly improve the forward conversion efficiency, with an AT metric improvement above 100%, regarding the related state of the art. Delay improvements of 2.17 times with only 5% area increase can be achieved if a proper selection of the {2(n) +/- k} moduli is performed.IEEE-Institute Electrical Electronics Engineers INCRCIPLMiguens Matutino, PedroChaves, RicardoSousa, Leonel2016-02-25T15:29:49Z2015-032015-03-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10400.21/5740engMATUTINO, Pedro Miguens; CHAVES, Ricardo; SOUSA, Leonel - Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. ISSN. 1063-8210. Vol. 23, N.º 3 (2015), pp. 603-6071063-821010.1109/TVLSI.2014.2314174metadata only accessinfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-08-03T09:49:35Zoai:repositorio.ipl.pt:10400.21/5740Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T20:14:58.967360Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range
title Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range
spellingShingle Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range
Miguens Matutino, Pedro
Arithmetic
Binary-to-RNS
Forward conversion
Residue number systems
title_short Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range
title_full Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range
title_fullStr Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range
title_full_unstemmed Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range
title_sort Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range
author Miguens Matutino, Pedro
author_facet Miguens Matutino, Pedro
Chaves, Ricardo
Sousa, Leonel
author_role author
author2 Chaves, Ricardo
Sousa, Leonel
author2_role author
author
dc.contributor.none.fl_str_mv RCIPL
dc.contributor.author.fl_str_mv Miguens Matutino, Pedro
Chaves, Ricardo
Sousa, Leonel
dc.subject.por.fl_str_mv Arithmetic
Binary-to-RNS
Forward conversion
Residue number systems
topic Arithmetic
Binary-to-RNS
Forward conversion
Residue number systems
description In this brief, a read-only-memoryless structure for binary-to-residue number system (RNS) conversion modulo {2(n) +/- k} is proposed. This structure is based only on adders and constant multipliers. This brief is motivated by the existing {2(n) +/- k} binary-to-RNS converters, which are particular inefficient for larger values of n. The experimental results obtained for 4n and 8n bits of dynamic range suggest that the proposed conversion structures are able to significantly improve the forward conversion efficiency, with an AT metric improvement above 100%, regarding the related state of the art. Delay improvements of 2.17 times with only 5% area increase can be achieved if a proper selection of the {2(n) +/- k} moduli is performed.
publishDate 2015
dc.date.none.fl_str_mv 2015-03
2015-03-01T00:00:00Z
2016-02-25T15:29:49Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
format article
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://hdl.handle.net/10400.21/5740
url http://hdl.handle.net/10400.21/5740
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv MATUTINO, Pedro Miguens; CHAVES, Ricardo; SOUSA, Leonel - Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. ISSN. 1063-8210. Vol. 23, N.º 3 (2015), pp. 603-607
1063-8210
10.1109/TVLSI.2014.2314174
dc.rights.driver.fl_str_mv metadata only access
info:eu-repo/semantics/openAccess
rights_invalid_str_mv metadata only access
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv IEEE-Institute Electrical Electronics Engineers INC
publisher.none.fl_str_mv IEEE-Institute Electrical Electronics Engineers INC
dc.source.none.fl_str_mv reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
instacron:RCAAP
instname_str Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação
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repository.mail.fl_str_mv
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