An efficient scalable RNS architecture for large dynamic ranges
Autor(a) principal: | |
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Data de Publicação: | 2014 |
Outros Autores: | , |
Tipo de documento: | Artigo |
Idioma: | eng |
Título da fonte: | Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
Texto Completo: | http://hdl.handle.net/10400.21/4787 |
Resumo: | This paper proposes an efficient scalable Residue Number System (RNS) architecture supporting moduli sets with an arbitrary number of channels, allowing to achieve larger dynamic range and a higher level of parallelism. The proposed architecture allows the forward and reverse RNS conversion, by reusing the arithmetic channel units. The arithmetic operations supported at the channel level include addition, subtraction, and multiplication with accumulation capability. For the reverse conversion two algorithms are considered, one based on the Chinese Remainder Theorem and the other one on Mixed-Radix-Conversion, leading to implementations optimized for delay and required circuit area. With the proposed architecture a complete and compact RNS platform is achieved. Experimental results suggest gains of 17 % in the delay in the arithmetic operations, with an area reduction of 23 % regarding the RNS state of the art. When compared with a binary system the proposed architecture allows to perform the same computation 20 times faster alongside with only 10 % of the circuit area resources. |
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An efficient scalable RNS architecture for large dynamic rangesComputer ArithmeticResidue Number SystemLarge Dynamic RangeChinese Remainder TheoremMixed Radix ConversionThis paper proposes an efficient scalable Residue Number System (RNS) architecture supporting moduli sets with an arbitrary number of channels, allowing to achieve larger dynamic range and a higher level of parallelism. The proposed architecture allows the forward and reverse RNS conversion, by reusing the arithmetic channel units. The arithmetic operations supported at the channel level include addition, subtraction, and multiplication with accumulation capability. For the reverse conversion two algorithms are considered, one based on the Chinese Remainder Theorem and the other one on Mixed-Radix-Conversion, leading to implementations optimized for delay and required circuit area. With the proposed architecture a complete and compact RNS platform is achieved. Experimental results suggest gains of 17 % in the delay in the arithmetic operations, with an area reduction of 23 % regarding the RNS state of the art. When compared with a binary system the proposed architecture allows to perform the same computation 20 times faster alongside with only 10 % of the circuit area resources.SpringerRCIPLMiguens Matutino, PedroChaves, RicardoSousa, Leonel2015-08-17T16:14:21Z2014-102014-10-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10400.21/4787engMATUTINO, Pedro Miguel Florindo Miguens; CHAVES, Ricardo; SOUSA, Leonel – An efficient scalable RNS architecture for large dynamic ranges. Journal of Processing Systems for Signal Image and Video Techonology. ISSN: 1939-8018. Vol. 77 nr. 1-2 (2014) p. 191-205.1939-801810.1007/s11265-014-0875-2metadata only accessinfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-08-03T09:47:17Zoai:repositorio.ipl.pt:10400.21/4787Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T20:14:10.268679Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse |
dc.title.none.fl_str_mv |
An efficient scalable RNS architecture for large dynamic ranges |
title |
An efficient scalable RNS architecture for large dynamic ranges |
spellingShingle |
An efficient scalable RNS architecture for large dynamic ranges Miguens Matutino, Pedro Computer Arithmetic Residue Number System Large Dynamic Range Chinese Remainder Theorem Mixed Radix Conversion |
title_short |
An efficient scalable RNS architecture for large dynamic ranges |
title_full |
An efficient scalable RNS architecture for large dynamic ranges |
title_fullStr |
An efficient scalable RNS architecture for large dynamic ranges |
title_full_unstemmed |
An efficient scalable RNS architecture for large dynamic ranges |
title_sort |
An efficient scalable RNS architecture for large dynamic ranges |
author |
Miguens Matutino, Pedro |
author_facet |
Miguens Matutino, Pedro Chaves, Ricardo Sousa, Leonel |
author_role |
author |
author2 |
Chaves, Ricardo Sousa, Leonel |
author2_role |
author author |
dc.contributor.none.fl_str_mv |
RCIPL |
dc.contributor.author.fl_str_mv |
Miguens Matutino, Pedro Chaves, Ricardo Sousa, Leonel |
dc.subject.por.fl_str_mv |
Computer Arithmetic Residue Number System Large Dynamic Range Chinese Remainder Theorem Mixed Radix Conversion |
topic |
Computer Arithmetic Residue Number System Large Dynamic Range Chinese Remainder Theorem Mixed Radix Conversion |
description |
This paper proposes an efficient scalable Residue Number System (RNS) architecture supporting moduli sets with an arbitrary number of channels, allowing to achieve larger dynamic range and a higher level of parallelism. The proposed architecture allows the forward and reverse RNS conversion, by reusing the arithmetic channel units. The arithmetic operations supported at the channel level include addition, subtraction, and multiplication with accumulation capability. For the reverse conversion two algorithms are considered, one based on the Chinese Remainder Theorem and the other one on Mixed-Radix-Conversion, leading to implementations optimized for delay and required circuit area. With the proposed architecture a complete and compact RNS platform is achieved. Experimental results suggest gains of 17 % in the delay in the arithmetic operations, with an area reduction of 23 % regarding the RNS state of the art. When compared with a binary system the proposed architecture allows to perform the same computation 20 times faster alongside with only 10 % of the circuit area resources. |
publishDate |
2014 |
dc.date.none.fl_str_mv |
2014-10 2014-10-01T00:00:00Z 2015-08-17T16:14:21Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article |
format |
article |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://hdl.handle.net/10400.21/4787 |
url |
http://hdl.handle.net/10400.21/4787 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
MATUTINO, Pedro Miguel Florindo Miguens; CHAVES, Ricardo; SOUSA, Leonel – An efficient scalable RNS architecture for large dynamic ranges. Journal of Processing Systems for Signal Image and Video Techonology. ISSN: 1939-8018. Vol. 77 nr. 1-2 (2014) p. 191-205. 1939-8018 10.1007/s11265-014-0875-2 |
dc.rights.driver.fl_str_mv |
metadata only access info:eu-repo/semantics/openAccess |
rights_invalid_str_mv |
metadata only access |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
application/pdf |
dc.publisher.none.fl_str_mv |
Springer |
publisher.none.fl_str_mv |
Springer |
dc.source.none.fl_str_mv |
reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação instacron:RCAAP |
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Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
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RCAAP |
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RCAAP |
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Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
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Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
repository.name.fl_str_mv |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
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1799133399623925760 |