Parameterizable CAN Switch implementation using FPGA

• Autor(a) principal: Faria, João
• Data de Publicação: 2009
• Outros Autores: Madail, Samuel, Oliveira, Arnaldo
• Tipo de documento: Artigo
• Idioma: eng
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: https://proa.ua.pt/index.php/revdeti/article/view/16896

The Controller Area Network is a well known fieldbus commonly used in many distributed control systems. However, the original bus topology of CAN limits its usagein safety-critical and fault tolerant applications. In order toimprove its performance and allow its deployment in safetycritical applications, several CAN hubs and switches have been created, permitting the adoption of star-based topologies. This paper presents the architecture, FPGA implementationand test of a parameterizable CAN 2.0B switch based ona synthesizable CAN intellectual property core developed atDETI-UA. The switch consists of multiple instantiated CANcontrollers, the pool of message buffers and the logic required to forward messages between ports. All switch core components are implemented in FPGA logic cells, except the CAN physical layer transceivers.