Implementação e simulação do processador MIPS com a ALU reconfigurável dinamicamente

• Autor(a) principal: Skliarova, Iouliia
• Data de Publicação: 1999
• Outros Autores: Ferrari, António B.
• Tipo de documento: Artigo
• Idioma: por
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: https://proa.ua.pt/index.php/revdeti/article/view/19344

This article describes a set of simulation tools for processors implementing subsets of the MIPS architecture. The design environment that has been created allows the user to write simple assembly language programs and to visualize their execution in terms of the processor's internal structure, i.e. of the control signals generated with the flow of time, ALU operation results and contents of registers. Processors with different structures, although implementing the same set of instructions, have been investigated. They allow to contrast the complexity and performance of different realizations. A microprogrammed version of the processor allows to addnew instructions by writing microprograms that implement those instructions.Additionally, and as an experiment in the design of reconfigurable function units, two different implementations of an ALU for the MIPS datapath, have been designed using a dynamically reconfigurable FPGA of the XC6200 family.