Utilização de hardware reconfigurável para acelerar a satisfação booleana

• Autor(a) principal: Skliarova, Iouliia
• Data de Publicação: 2001
• Outros Autores: Ferrari, António B.
• Tipo de documento: Artigo
• Idioma: por
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: https://proa.ua.pt/index.php/revdeti/article/view/18114

The paper presents a case study of accelerating Boolean satisfiability in reconfigurable hardware. Boolean satisfiability (SAT) is an important problem having many applications in CAD and other areas. We propose an application-specific approach to accelerate the backtrack search algorithm for the SAT problem formulated over discrete matrix. The algorithm employed involves a quite sophisticated control unit, which is entirely implemented in reconfigurable hardware. Finally, we analyze different possibilities of solving the SAT problem and argue that the best results can be achieved by the use of software, runningon a general-purpose computer, together with an FPGAbasedreconfigurable SAT solver.