Parallel game architectures with tardiness policy and workload balance

Detalhes bibliográficos
Autor(a) principal: Zamith, Marcelo
Data de Publicação: 2017
Outros Autores: Valente, Luis, Feijó, Bruno, Joselli, Mark, Clua, Esteban
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Journal on Interactive Systems
Texto Completo: https://sol.sbc.org.br/journals/index.php/jis/article/view/676
Resumo: Computer games are real-time applications that create interactive virtual environments, usually as discrete time-stepped simulations. These simulations may have predefined time step sizes or may use variable time step sizes. These approaches are common in games, but not flexible. In the first approach, when the game runs on a machine with abundant resources, the game does not use the extra capacity to improve simulation quality (task results or presentation). The second approach usually runs the simulation as fast as possible, using the time elapsed between consecutive time steps to scale all computations, so as the simulation runs in real-time. However, this approach wastes processor time and energy and in multi-core hardware scenarios (e.g., GPUs and clusters), the problem of wasting computing resources becomes more severe. In this paper, we propose a parallel and adaptive architecture that employs workload balance, precedence of game tasks and tardiness policy in multi-core hardware to handle the aforementioned issues. The architecture uses tardiness policy to monitor and change task behavior according to the current conditions of he host hardware. On more powerful computers, the architecture is able to improve task quality if there is spare time available. On less powerful computers, the architecture restricts task functionality so that tasks are able to complete on time. We provide two examples to demonstrate how the architecture works.
id SBC-3_a1e37b79fe874d5f1e0b1e2a247cce57
oai_identifier_str oai:ojs2.sol.sbc.org.br:article/676
network_acronym_str SBC-3
network_name_str Journal on Interactive Systems
repository_id_str
spelling Parallel game architectures with tardiness policy and workload balanceComputer games are real-time applications that create interactive virtual environments, usually as discrete time-stepped simulations. These simulations may have predefined time step sizes or may use variable time step sizes. These approaches are common in games, but not flexible. In the first approach, when the game runs on a machine with abundant resources, the game does not use the extra capacity to improve simulation quality (task results or presentation). The second approach usually runs the simulation as fast as possible, using the time elapsed between consecutive time steps to scale all computations, so as the simulation runs in real-time. However, this approach wastes processor time and energy and in multi-core hardware scenarios (e.g., GPUs and clusters), the problem of wasting computing resources becomes more severe. In this paper, we propose a parallel and adaptive architecture that employs workload balance, precedence of game tasks and tardiness policy in multi-core hardware to handle the aforementioned issues. The architecture uses tardiness policy to monitor and change task behavior according to the current conditions of he host hardware. On more powerful computers, the architecture is able to improve task quality if there is spare time available. On less powerful computers, the architecture restricts task functionality so that tasks are able to complete on time. We provide two examples to demonstrate how the architecture works.Nenhum resumo disponívelBrazilian Computer Society2017-09-14info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionapplication/pdfhttps://sol.sbc.org.br/journals/index.php/jis/article/view/67610.5753/jis.2017.676Journal of Interactive Systems; v. 8 n. 1 (2017)Journal on Interactive Systems; Vol. 8 No. 1 (2017)2763-7719reponame:Journal on Interactive Systemsinstname:Sociedade Brasileira de Computação (SBC)instacron:SBCenghttps://sol.sbc.org.br/journals/index.php/jis/article/view/676/671Zamith, MarceloValente, LuisFeijó, BrunoJoselli, MarkClua, Estebaninfo:eu-repo/semantics/openAccess2020-09-05T16:09:09Zoai:ojs2.sol.sbc.org.br:article/676Revistahttps://sol.sbc.org.br/journals/index.php/jis/ONGhttps://sol.sbc.org.br/journals/index.php/jis/oaijis@sbc.org.br2763-77192763-7719opendoar:2020-09-05T16:09:09Journal on Interactive Systems - Sociedade Brasileira de Computação (SBC)false
dc.title.none.fl_str_mv Parallel game architectures with tardiness policy and workload balance
title Parallel game architectures with tardiness policy and workload balance
spellingShingle Parallel game architectures with tardiness policy and workload balance
Zamith, Marcelo
title_short Parallel game architectures with tardiness policy and workload balance
title_full Parallel game architectures with tardiness policy and workload balance
title_fullStr Parallel game architectures with tardiness policy and workload balance
title_full_unstemmed Parallel game architectures with tardiness policy and workload balance
title_sort Parallel game architectures with tardiness policy and workload balance
author Zamith, Marcelo
author_facet Zamith, Marcelo
Valente, Luis
Feijó, Bruno
Joselli, Mark
Clua, Esteban
author_role author
author2 Valente, Luis
Feijó, Bruno
Joselli, Mark
Clua, Esteban
author2_role author
author
author
author
dc.contributor.author.fl_str_mv Zamith, Marcelo
Valente, Luis
Feijó, Bruno
Joselli, Mark
Clua, Esteban
description Computer games are real-time applications that create interactive virtual environments, usually as discrete time-stepped simulations. These simulations may have predefined time step sizes or may use variable time step sizes. These approaches are common in games, but not flexible. In the first approach, when the game runs on a machine with abundant resources, the game does not use the extra capacity to improve simulation quality (task results or presentation). The second approach usually runs the simulation as fast as possible, using the time elapsed between consecutive time steps to scale all computations, so as the simulation runs in real-time. However, this approach wastes processor time and energy and in multi-core hardware scenarios (e.g., GPUs and clusters), the problem of wasting computing resources becomes more severe. In this paper, we propose a parallel and adaptive architecture that employs workload balance, precedence of game tasks and tardiness policy in multi-core hardware to handle the aforementioned issues. The architecture uses tardiness policy to monitor and change task behavior according to the current conditions of he host hardware. On more powerful computers, the architecture is able to improve task quality if there is spare time available. On less powerful computers, the architecture restricts task functionality so that tasks are able to complete on time. We provide two examples to demonstrate how the architecture works.
publishDate 2017
dc.date.none.fl_str_mv 2017-09-14
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
format article
status_str publishedVersion
dc.identifier.uri.fl_str_mv https://sol.sbc.org.br/journals/index.php/jis/article/view/676
10.5753/jis.2017.676
url https://sol.sbc.org.br/journals/index.php/jis/article/view/676
identifier_str_mv 10.5753/jis.2017.676
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv https://sol.sbc.org.br/journals/index.php/jis/article/view/676/671
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Brazilian Computer Society
publisher.none.fl_str_mv Brazilian Computer Society
dc.source.none.fl_str_mv Journal of Interactive Systems; v. 8 n. 1 (2017)
Journal on Interactive Systems; Vol. 8 No. 1 (2017)
2763-7719
reponame:Journal on Interactive Systems
instname:Sociedade Brasileira de Computação (SBC)
instacron:SBC
instname_str Sociedade Brasileira de Computação (SBC)
instacron_str SBC
institution SBC
reponame_str Journal on Interactive Systems
collection Journal on Interactive Systems
repository.name.fl_str_mv Journal on Interactive Systems - Sociedade Brasileira de Computação (SBC)
repository.mail.fl_str_mv jis@sbc.org.br
_version_ 1796797411002155008