Post-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reduction

Detalhes bibliográficos
Autor(a) principal: Jeferson Figueiredo Chaves
Data de Publicação: 2020
Tipo de documento: Tese
Idioma: eng
Título da fonte: Repositório Institucional da UFMG
Texto Completo: http://hdl.handle.net/1843/38083
Resumo: Progress in computer performance is promoted on several fronts. Initiatives such as the implementation of optimal algorithms, parallelization of algorithms and architectures, and, at a lower level, Moore's Law, have guaranteed performance evolution. The latter, in particular, already shows clear signs of exhaustion, imposing on industry and academia the search for alternatives. The reason is heat generation, which has been one of the main obstacles to reducing digital devices' dimensions. Landauer investigated the origin of this problem and demonstrated analytically in 1961 that the cause is the erasure of information in each logic gate. This fundamental energy limit, named Landauer's Principle, was experimentally proven in 2012, indicating that there is indeed a limit on energy scalability for conventional computer systems. In this work, we introduce approaches to reduce those losses by applying post-synthesis methods. First, we propose a novel method to divide Partially Reversible Pipelined circuits into stages, computing the optimal energy vs. throughput tradeoff. Specifically, we develop an algorithm that, given the circuit, it returns the division that yields the minimum possible energy dissipation while considering a minimum throughput restriction. We also developed an optimal algorithm that, given the maximum energy restriction, finds the maximum possible throughput. Therefore, the designer can have the best partially reversible pipelined circuit configuration according to its project requirements. Computational experiments show that our algorithm outperforms the state-of-the-art algorithm from the literature in solution's quantity and quality, being able to dominate about 56% of its best solutions and to generate 11X more solutions, on average. The other strategy is a novel technique that identifies exploitable fan-outs and uses them to reduce energy losses in FCN circuits, thus enabling the design of new types of partially reversible systems. Moreover, we propose an algorithm that creates partially reversible systems while allowing the designer to choose between energy reduction with no effect on the delay or focus solely on energy and accepting a potential delay penalty. Simulation results for state-of-the-art benchmarks indicate an average reduction of the fundamental energy limit by 44% without affecting the delay. If delay is not the main concern, the average reduction reaches even 77%. Finally, we present a unified analysis of both partially reversible systems. These efforts open new perspectives in designing FCN systems where energy efficiency is mandatory.
id UFMG_394d8106125c1c3acfad22e76a0bd391
oai_identifier_str oai:repositorio.ufmg.br:1843/38083
network_acronym_str UFMG
network_name_str Repositório Institucional da UFMG
repository_id_str
spelling Omar Paranaiba Vilela Netohttp://lattes.cnpq.br/6799776599317117Renato Perez RibasFrank Sill TorresLuiz Filipe Menezes VieiraMário Sérgio Ferreira Alvimhttp://lattes.cnpq.br/2628557550611049Jeferson Figueiredo Chaves2021-09-19T23:45:17Z2021-09-19T23:45:17Z2020-08-17http://hdl.handle.net/1843/38083Progress in computer performance is promoted on several fronts. Initiatives such as the implementation of optimal algorithms, parallelization of algorithms and architectures, and, at a lower level, Moore's Law, have guaranteed performance evolution. The latter, in particular, already shows clear signs of exhaustion, imposing on industry and academia the search for alternatives. The reason is heat generation, which has been one of the main obstacles to reducing digital devices' dimensions. Landauer investigated the origin of this problem and demonstrated analytically in 1961 that the cause is the erasure of information in each logic gate. This fundamental energy limit, named Landauer's Principle, was experimentally proven in 2012, indicating that there is indeed a limit on energy scalability for conventional computer systems. In this work, we introduce approaches to reduce those losses by applying post-synthesis methods. First, we propose a novel method to divide Partially Reversible Pipelined circuits into stages, computing the optimal energy vs. throughput tradeoff. Specifically, we develop an algorithm that, given the circuit, it returns the division that yields the minimum possible energy dissipation while considering a minimum throughput restriction. We also developed an optimal algorithm that, given the maximum energy restriction, finds the maximum possible throughput. Therefore, the designer can have the best partially reversible pipelined circuit configuration according to its project requirements. Computational experiments show that our algorithm outperforms the state-of-the-art algorithm from the literature in solution's quantity and quality, being able to dominate about 56% of its best solutions and to generate 11X more solutions, on average. The other strategy is a novel technique that identifies exploitable fan-outs and uses them to reduce energy losses in FCN circuits, thus enabling the design of new types of partially reversible systems. Moreover, we propose an algorithm that creates partially reversible systems while allowing the designer to choose between energy reduction with no effect on the delay or focus solely on energy and accepting a potential delay penalty. Simulation results for state-of-the-art benchmarks indicate an average reduction of the fundamental energy limit by 44% without affecting the delay. If delay is not the main concern, the average reduction reaches even 77%. Finally, we present a unified analysis of both partially reversible systems. These efforts open new perspectives in designing FCN systems where energy efficiency is mandatory.O avanço no desempenho de computadores é promovido em diversas frentes. Iniciativas como a implementação de algoritmos ótimos, paralelização de algoritmos e arquiteturas e, em um nível mais baixo, a Lei de Moore, têm garantido a evolução do desempenho. Essa última, em especial, já apresenta claros sinais de esgotamento impondo à indústria e à academia a busca de alternativas. Isso ocorre porque a geração de calor tem sido um dos principais entraves na continuidade da redução das dimensões dos dispositivos digitais. Landauer investigou a origem deste problema e demonstrou analiticamente em 1961 que a causa é o apagamento de informação que ocorre em cada porta lógica. O Princípio de Landauer, nome pelo qual este limite energético fundamental ficou conhecido, foi provado experimentalmente em 2012 indicando que de fato há um limite na escalabilidade energética para sistemas computacionais convencionais. Neste trabalho, são identificadas e exploradas oportunidades de redução dos limites energéticos fundamentais em circuitos digitais de dispositivos de acoplamento local de campo. As estratégias propostas de redução do apagamento de informação são baseadas em manipulações na temporização ou no leiaute dos circuitos após o processo de síntese lógica. Avaliando o impacto das alterações da temporização sobre um conjunto de benchmarks do estado-da-arte, foi observado que há um grande espaço de configurações para os circuitos. Neste caso há um compromisso entre vazão e energia onde a melhora de uma destas métricas implica na degradação da outra. Através da análise deste espaço de configurações foi possível indicar estratégias ótimas que permitem melhorar uma métrica e minimizar a degradação da outra. Especificamente, foi desenvolvido um algoritmo que, dada a rede lógica de um circuito, retorna a configuração que produz a energia dissipada mínima enquanto considerada uma restrição mínima de vazão. Também foi desenvolvido um algoritmo em que dada uma restrição máxima de energia, encontra a vazão máxima. Desta forma, um projetista pode encontrar a melhor configuração de temporização dado seus requisitos de projeto. Experimentos demonstraram que os algoritmos propostos superam o algoritmo do estado-da-arte em qualidade e quantidade de soluções, sendo capaz de dominar 56% das melhores soluções e gerar 11⇥ mais soluções em média. Outra contribuição deste trabalho é a proposta de um novo tipo de sistema parcialmente reversível. A estratégia de redução de perdas energéticas consiste na mudança de leiaute do circuito de forma a incorporar derivações (fanouts) em portas lógicas. Observa-se neste caso que os limites energéticos fundamentais podem ser reduzidos em média em 44% sem nenhum atraso adicional dos sinais lógicos. Caso atrasos não sejam um problema, a redução média pode alcançar até 77%. Por fim, foi realizada uma análise unificada dos sistemas resultantes de cada estratégia. Estes esforços apresentados criam novas perspectivas para o projeto de circuitos de dispositivos de acoplamento local de campo onde a eficiência energética é essencial.engUniversidade Federal de Minas GeraisPrograma de Pós-Graduação em Ciência da ComputaçãoUFMGBrasilComputação – TesesSistemas digitais – Teses.Arquitetura de computador – Teses.Nanocomputação – Teses.Computação Reversível – TesesNanocomputingReversible ComputingField-coupled nanocomputing devicesPost-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reductioninfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/doctoralThesisinfo:eu-repo/semantics/openAccessreponame:Repositório Institucional da UFMGinstname:Universidade Federal de Minas Gerais (UFMG)instacron:UFMGORIGINALThesis_JefersonFigueiredoChaves_PDFA.pdfThesis_JefersonFigueiredoChaves_PDFA.pdfapplication/pdf8184885https://repositorio.ufmg.br/bitstream/1843/38083/3/Thesis_JefersonFigueiredoChaves_PDFA.pdf51a8cb394c2ecbb849f124053eee09dfMD53LICENSElicense.txtlicense.txttext/plain; charset=utf-82118https://repositorio.ufmg.br/bitstream/1843/38083/4/license.txtcda590c95a0b51b4d15f60c9642ca272MD541843/380832021-09-19 20:45:17.949oai:repositorio.ufmg.br:1843/38083TElDRU7Dh0EgREUgRElTVFJJQlVJw4fDg08gTsODTy1FWENMVVNJVkEgRE8gUkVQT1NJVMOTUklPIElOU1RJVFVDSU9OQUwgREEgVUZNRwoKQ29tIGEgYXByZXNlbnRhw6fDo28gZGVzdGEgbGljZW7Dp2EsIHZvY8OqIChvIGF1dG9yIChlcykgb3UgbyB0aXR1bGFyIGRvcyBkaXJlaXRvcyBkZSBhdXRvcikgY29uY2VkZSBhbyBSZXBvc2l0w7NyaW8gSW5zdGl0dWNpb25hbCBkYSBVRk1HIChSSS1VRk1HKSBvIGRpcmVpdG8gbsOjbyBleGNsdXNpdm8gZSBpcnJldm9nw6F2ZWwgZGUgcmVwcm9kdXppciBlL291IGRpc3RyaWJ1aXIgYSBzdWEgcHVibGljYcOnw6NvIChpbmNsdWluZG8gbyByZXN1bW8pIHBvciB0b2RvIG8gbXVuZG8gbm8gZm9ybWF0byBpbXByZXNzbyBlIGVsZXRyw7RuaWNvIGUgZW0gcXVhbHF1ZXIgbWVpbywgaW5jbHVpbmRvIG9zIGZvcm1hdG9zIMOhdWRpbyBvdSB2w61kZW8uCgpWb2PDqiBkZWNsYXJhIHF1ZSBjb25oZWNlIGEgcG9sw610aWNhIGRlIGNvcHlyaWdodCBkYSBlZGl0b3JhIGRvIHNldSBkb2N1bWVudG8gZSBxdWUgY29uaGVjZSBlIGFjZWl0YSBhcyBEaXJldHJpemVzIGRvIFJJLVVGTUcuCgpWb2PDqiBjb25jb3JkYSBxdWUgbyBSZXBvc2l0w7NyaW8gSW5zdGl0dWNpb25hbCBkYSBVRk1HIHBvZGUsIHNlbSBhbHRlcmFyIG8gY29udGXDumRvLCB0cmFuc3BvciBhIHN1YSBwdWJsaWNhw6fDo28gcGFyYSBxdWFscXVlciBtZWlvIG91IGZvcm1hdG8gcGFyYSBmaW5zIGRlIHByZXNlcnZhw6fDo28uCgpWb2PDqiB0YW1iw6ltIGNvbmNvcmRhIHF1ZSBvIFJlcG9zaXTDs3JpbyBJbnN0aXR1Y2lvbmFsIGRhIFVGTUcgcG9kZSBtYW50ZXIgbWFpcyBkZSB1bWEgY8OzcGlhIGRlIHN1YSBwdWJsaWNhw6fDo28gcGFyYSBmaW5zIGRlIHNlZ3VyYW7Dp2EsIGJhY2stdXAgZSBwcmVzZXJ2YcOnw6NvLgoKVm9jw6ogZGVjbGFyYSBxdWUgYSBzdWEgcHVibGljYcOnw6NvIMOpIG9yaWdpbmFsIGUgcXVlIHZvY8OqIHRlbSBvIHBvZGVyIGRlIGNvbmNlZGVyIG9zIGRpcmVpdG9zIGNvbnRpZG9zIG5lc3RhIGxpY2Vuw6dhLiBWb2PDqiB0YW1iw6ltIGRlY2xhcmEgcXVlIG8gZGVww7NzaXRvIGRlIHN1YSBwdWJsaWNhw6fDo28gbsOjbywgcXVlIHNlamEgZGUgc2V1IGNvbmhlY2ltZW50bywgaW5mcmluZ2UgZGlyZWl0b3MgYXV0b3JhaXMgZGUgbmluZ3XDqW0uCgpDYXNvIGEgc3VhIHB1YmxpY2HDp8OjbyBjb250ZW5oYSBtYXRlcmlhbCBxdWUgdm9jw6ogbsOjbyBwb3NzdWkgYSB0aXR1bGFyaWRhZGUgZG9zIGRpcmVpdG9zIGF1dG9yYWlzLCB2b2PDqiBkZWNsYXJhIHF1ZSBvYnRldmUgYSBwZXJtaXNzw6NvIGlycmVzdHJpdGEgZG8gZGV0ZW50b3IgZG9zIGRpcmVpdG9zIGF1dG9yYWlzIHBhcmEgY29uY2VkZXIgYW8gUmVwb3NpdMOzcmlvIEluc3RpdHVjaW9uYWwgZGEgVUZNRyBvcyBkaXJlaXRvcyBhcHJlc2VudGFkb3MgbmVzdGEgbGljZW7Dp2EsIGUgcXVlIGVzc2UgbWF0ZXJpYWwgZGUgcHJvcHJpZWRhZGUgZGUgdGVyY2Vpcm9zIGVzdMOhIGNsYXJhbWVudGUgaWRlbnRpZmljYWRvIGUgcmVjb25oZWNpZG8gbm8gdGV4dG8gb3Ugbm8gY29udGXDumRvIGRhIHB1YmxpY2HDp8OjbyBvcmEgZGVwb3NpdGFkYS4KCkNBU08gQSBQVUJMSUNBw4fDg08gT1JBIERFUE9TSVRBREEgVEVOSEEgU0lETyBSRVNVTFRBRE8gREUgVU0gUEFUUk9Dw41OSU8gT1UgQVBPSU8gREUgVU1BIEFHw4pOQ0lBIERFIEZPTUVOVE8gT1UgT1VUUk8gT1JHQU5JU01PLCBWT0PDiiBERUNMQVJBIFFVRSBSRVNQRUlUT1UgVE9ET1MgRSBRVUFJU1FVRVIgRElSRUlUT1MgREUgUkVWSVPDg08gQ09NTyBUQU1Cw4lNIEFTIERFTUFJUyBPQlJJR0HDh8OVRVMgRVhJR0lEQVMgUE9SIENPTlRSQVRPIE9VIEFDT1JETy4KCk8gUmVwb3NpdMOzcmlvIEluc3RpdHVjaW9uYWwgZGEgVUZNRyBzZSBjb21wcm9tZXRlIGEgaWRlbnRpZmljYXIgY2xhcmFtZW50ZSBvIHNldSBub21lKHMpIG91IG8ocykgbm9tZXMocykgZG8ocykgZGV0ZW50b3IoZXMpIGRvcyBkaXJlaXRvcyBhdXRvcmFpcyBkYSBwdWJsaWNhw6fDo28sIGUgbsOjbyBmYXLDoSBxdWFscXVlciBhbHRlcmHDp8OjbywgYWzDqW0gZGFxdWVsYXMgY29uY2VkaWRhcyBwb3IgZXN0YSBsaWNlbsOnYS4KRepositório de PublicaçõesPUBhttps://repositorio.ufmg.br/oaiopendoar:2021-09-19T23:45:17Repositório Institucional da UFMG - Universidade Federal de Minas Gerais (UFMG)false
dc.title.pt_BR.fl_str_mv Post-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reduction
title Post-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reduction
spellingShingle Post-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reduction
Jeferson Figueiredo Chaves
Nanocomputing
Reversible Computing
Field-coupled nanocomputing devices
Computação – Teses
Sistemas digitais – Teses.
Arquitetura de computador – Teses.
Nanocomputação – Teses.
Computação Reversível – Teses
title_short Post-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reduction
title_full Post-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reduction
title_fullStr Post-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reduction
title_full_unstemmed Post-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reduction
title_sort Post-synthesis manipulation of field-coupled nanocomputing circuits for fundamental energy reduction
author Jeferson Figueiredo Chaves
author_facet Jeferson Figueiredo Chaves
author_role author
dc.contributor.advisor1.fl_str_mv Omar Paranaiba Vilela Neto
dc.contributor.advisor1Lattes.fl_str_mv http://lattes.cnpq.br/6799776599317117
dc.contributor.referee1.fl_str_mv Renato Perez Ribas
dc.contributor.referee2.fl_str_mv Frank Sill Torres
dc.contributor.referee3.fl_str_mv Luiz Filipe Menezes Vieira
dc.contributor.referee4.fl_str_mv Mário Sérgio Ferreira Alvim
dc.contributor.authorLattes.fl_str_mv http://lattes.cnpq.br/2628557550611049
dc.contributor.author.fl_str_mv Jeferson Figueiredo Chaves
contributor_str_mv Omar Paranaiba Vilela Neto
Renato Perez Ribas
Frank Sill Torres
Luiz Filipe Menezes Vieira
Mário Sérgio Ferreira Alvim
dc.subject.por.fl_str_mv Nanocomputing
Reversible Computing
Field-coupled nanocomputing devices
topic Nanocomputing
Reversible Computing
Field-coupled nanocomputing devices
Computação – Teses
Sistemas digitais – Teses.
Arquitetura de computador – Teses.
Nanocomputação – Teses.
Computação Reversível – Teses
dc.subject.other.pt_BR.fl_str_mv Computação – Teses
Sistemas digitais – Teses.
Arquitetura de computador – Teses.
Nanocomputação – Teses.
Computação Reversível – Teses
description Progress in computer performance is promoted on several fronts. Initiatives such as the implementation of optimal algorithms, parallelization of algorithms and architectures, and, at a lower level, Moore's Law, have guaranteed performance evolution. The latter, in particular, already shows clear signs of exhaustion, imposing on industry and academia the search for alternatives. The reason is heat generation, which has been one of the main obstacles to reducing digital devices' dimensions. Landauer investigated the origin of this problem and demonstrated analytically in 1961 that the cause is the erasure of information in each logic gate. This fundamental energy limit, named Landauer's Principle, was experimentally proven in 2012, indicating that there is indeed a limit on energy scalability for conventional computer systems. In this work, we introduce approaches to reduce those losses by applying post-synthesis methods. First, we propose a novel method to divide Partially Reversible Pipelined circuits into stages, computing the optimal energy vs. throughput tradeoff. Specifically, we develop an algorithm that, given the circuit, it returns the division that yields the minimum possible energy dissipation while considering a minimum throughput restriction. We also developed an optimal algorithm that, given the maximum energy restriction, finds the maximum possible throughput. Therefore, the designer can have the best partially reversible pipelined circuit configuration according to its project requirements. Computational experiments show that our algorithm outperforms the state-of-the-art algorithm from the literature in solution's quantity and quality, being able to dominate about 56% of its best solutions and to generate 11X more solutions, on average. The other strategy is a novel technique that identifies exploitable fan-outs and uses them to reduce energy losses in FCN circuits, thus enabling the design of new types of partially reversible systems. Moreover, we propose an algorithm that creates partially reversible systems while allowing the designer to choose between energy reduction with no effect on the delay or focus solely on energy and accepting a potential delay penalty. Simulation results for state-of-the-art benchmarks indicate an average reduction of the fundamental energy limit by 44% without affecting the delay. If delay is not the main concern, the average reduction reaches even 77%. Finally, we present a unified analysis of both partially reversible systems. These efforts open new perspectives in designing FCN systems where energy efficiency is mandatory.
publishDate 2020
dc.date.issued.fl_str_mv 2020-08-17
dc.date.accessioned.fl_str_mv 2021-09-19T23:45:17Z
dc.date.available.fl_str_mv 2021-09-19T23:45:17Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/doctoralThesis
format doctoralThesis
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://hdl.handle.net/1843/38083
url http://hdl.handle.net/1843/38083
dc.language.iso.fl_str_mv eng
language eng
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.publisher.none.fl_str_mv Universidade Federal de Minas Gerais
dc.publisher.program.fl_str_mv Programa de Pós-Graduação em Ciência da Computação
dc.publisher.initials.fl_str_mv UFMG
dc.publisher.country.fl_str_mv Brasil
publisher.none.fl_str_mv Universidade Federal de Minas Gerais
dc.source.none.fl_str_mv reponame:Repositório Institucional da UFMG
instname:Universidade Federal de Minas Gerais (UFMG)
instacron:UFMG
instname_str Universidade Federal de Minas Gerais (UFMG)
instacron_str UFMG
institution UFMG
reponame_str Repositório Institucional da UFMG
collection Repositório Institucional da UFMG
bitstream.url.fl_str_mv https://repositorio.ufmg.br/bitstream/1843/38083/3/Thesis_JefersonFigueiredoChaves_PDFA.pdf
https://repositorio.ufmg.br/bitstream/1843/38083/4/license.txt
bitstream.checksum.fl_str_mv 51a8cb394c2ecbb849f124053eee09df
cda590c95a0b51b4d15f60c9642ca272
bitstream.checksumAlgorithm.fl_str_mv MD5
MD5
repository.name.fl_str_mv Repositório Institucional da UFMG - Universidade Federal de Minas Gerais (UFMG)
repository.mail.fl_str_mv
_version_ 1803589425801723904