SmartDR: algorithms and techniques for fast detailed routing with good design rule handling
Autor(a) principal: | |
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Data de Publicação: | 2020 |
Tipo de documento: | Tese |
Idioma: | por |
Título da fonte: | Repositório Institucional da UFPel - Guaiaca |
Texto Completo: | http://guaiaca.ufpel.edu.br/handle/prefix/6404 |
Resumo: | Detailed routing is one of the most challenging and time-consuming steps of the design of integrated circuits. The routing solution must obey all of the design rules so that the circuit can be properly manufactured. However, design rule handling may be very challenging, regarding its algorithmic solutions and implementation, and may easily lead to unfeasible runtimes. In order to make the detailed routing resolution more feasible, it is divided into two steps, where in the first, called initial detailed routing, an almost complete solution is achieved by relaxing design rules. In the second step the remaining design rule violations are solved. However, the more these rules are left to be handled in the second stage, the greater is the chance that they will not be completely solved, and this usually occurs. Thus, it is necessary to face the challenge of dealing with as many rules as possible in the first step without compromising the runtime. Thus, this work proposes an initial detailed router, called SmartDR, to meet these needs, that is, to provide a good design rule handling while keeping a good runtime. The main features of the router that meet these goals are pin access and path search techniques. This work proposes a novel pin access method, in which the pin access paths share the same routing resources and are dynamically legalized and implemented. It is also proposed a new path search algorithm, based on A *-interval search, which is aware of several design rules. A new method to improve the A * heuristic function is also proposed, taking into account the peculiarities of detailed routing, which leads to a better runtime. Using ISPD 2018 Contest benchmarks, all proposed methods were evaluated separately and altogether in the proposed router, which was compared with state-of-the-art routers. The experiments show that the proposed techniques contribute to runtime and design rule handling improvement, as well as it demonstrates that SmartDR is superior to the state-of-the-art routers in these metrics. |
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2020-08-13T11:59:30Z2020-08-13T11:59:30Z2020-01-15GONÇALVES, Stèphano Machado Moreira. SmartDR: Algorithms and Techniques for Fast Detailed Routing with Good Design Rule Handling. 2020. 130p. Thesis (Doctorate in Computer Science) – Postgraduate Program in Computer Science, Technology Development Center, Federal University of Pelotas, Pelotas, 2020.http://guaiaca.ufpel.edu.br/handle/prefix/6404Detailed routing is one of the most challenging and time-consuming steps of the design of integrated circuits. The routing solution must obey all of the design rules so that the circuit can be properly manufactured. However, design rule handling may be very challenging, regarding its algorithmic solutions and implementation, and may easily lead to unfeasible runtimes. In order to make the detailed routing resolution more feasible, it is divided into two steps, where in the first, called initial detailed routing, an almost complete solution is achieved by relaxing design rules. In the second step the remaining design rule violations are solved. However, the more these rules are left to be handled in the second stage, the greater is the chance that they will not be completely solved, and this usually occurs. Thus, it is necessary to face the challenge of dealing with as many rules as possible in the first step without compromising the runtime. Thus, this work proposes an initial detailed router, called SmartDR, to meet these needs, that is, to provide a good design rule handling while keeping a good runtime. The main features of the router that meet these goals are pin access and path search techniques. This work proposes a novel pin access method, in which the pin access paths share the same routing resources and are dynamically legalized and implemented. It is also proposed a new path search algorithm, based on A *-interval search, which is aware of several design rules. A new method to improve the A * heuristic function is also proposed, taking into account the peculiarities of detailed routing, which leads to a better runtime. Using ISPD 2018 Contest benchmarks, all proposed methods were evaluated separately and altogether in the proposed router, which was compared with state-of-the-art routers. The experiments show that the proposed techniques contribute to runtime and design rule handling improvement, as well as it demonstrates that SmartDR is superior to the state-of-the-art routers in these metrics.O roteamento detalhado é uma das etapas mais desafiadoras e demoradas do projeto de circuitos integrados. A solução do roteamento deve obedecer a todas as regras de projeto para que o circuito possa ser corretamente fabricado. No entanto, o tratamento de regras de projeto pode ser muito desafiador, quanto a suas soluções algorítmicas e sua implementação, e pode facilmente levar a tempos de execução inviáveis. Para tornar a resolução do roteamento detalhado mais factível, ele é dividido em duas etapas, onde, na primeira, chamada de roteamento detalhado inicial, uma solução quase completa é obtida mediante a flexibilização das regras de projeto. Na segunda etapa as violações remanescentes de regras de projeto são resolvidas. No entanto, quanto mais o tratamento dessas regras é deixado para a segunda etapa, maior é a chance de elas não serem resolvidas completamente, e isto costuma ocorrer. Assim, é necessário enfrentar o desafio de lidar com o maior número possível de regras na etapa inicial sem comprometer o desempenho do roteamento. Dessa forma, este trabalho propõe um roteador detalhado inicial, chamado SmartDR, para atender essas necessidades, isto é, apresentar uma boa lida com regras de projeto ao mesmo tempo que mantendo um bom desempenho. As principais características do roteador, que atendem a esses objetivos, são técnicas de acesso a pinos e de busca de caminhos. Este trabalho propõe um novo método de acesso a pinos, em que os caminhos de acesso a pinos compartilham os mesmos recursos de roteamento e são legalizados e implementados dinamicamente. Também é proposto um novo algoritmo de busca de caminhos, baseado na busca A* com intervalos, o qual é ciente de várias regras de projeto. É proposto também um novo método para melhorar a função heurística da busca A* levando em consideração peculiaridades do roteamento detalhado, o que leva a um melhor desempenho. Utilizando os benchmarks da competição ISPD 2018, todos os métodos propostos foram avaliados separadamente e em conjunto no roteador proposto, o qual foi comparado com os roteadores estado-da-arte. Os experimentos mostram que as técnicas propostas contribuem para uma melhoria em desempenho e um bom tratamento de regras de projeto, assim como demonstra que o SmartDR é superior aos roteadores estado da arte nesses mesmos quesitos.Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - CAPESporUniversidade Federal de PelotasPrograma de Pós-Graduação em ComputaçãoUFPelBrasilCentro de Desenvolvimento TecnológicoCNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAOComputaçãoDetailed routingPin accessPath searchDesign rulesISPD 2018 contestRoteamento detalhadoAcesso a pinosBusca de caminhosRegras de projetoISPD 2018 contestSmartDR: algorithms and techniques for fast detailed routing with good design rule handlinginfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/doctoralThesishttp://lattes.cnpq.br/8590220071194338http://lattes.cnpq.br/2054259785006041Rosa Junior, Leomar Soares dahttp://lattes.cnpq.br/1423810014480514Marques, Felipe de SouzaGonçalves, Stephano Machado Moreirainfo:eu-repo/semantics/openAccessreponame:Repositório Institucional da UFPel - Guaiacainstname:Universidade Federal de Pelotas (UFPEL)instacron:UFPELTEXTTese_Stephano_Machado_Moreira.pdf.txtTese_Stephano_Machado_Moreira.pdf.txtExtracted texttext/plain284662http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/6404/6/Tese_Stephano_Machado_Moreira.pdf.txt0f8d8b1ae7d8b5bf2d6d26ebb3138991MD56open accessTHUMBNAILTese_Stephano_Machado_Moreira.pdf.jpgTese_Stephano_Machado_Moreira.pdf.jpgGenerated Thumbnailimage/jpeg1201http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/6404/7/Tese_Stephano_Machado_Moreira.pdf.jpg16a4e6bfe50816d1ccfaf3b66e76e374MD57open accessORIGINALTese_Stephano_Machado_Moreira.pdfTese_Stephano_Machado_Moreira.pdfapplication/pdf3252235http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/6404/1/Tese_Stephano_Machado_Moreira.pdf16f91f7fc566bd22ffa09aa59c0d5b72MD51open accessCC-LICENSElicense_urllicense_urltext/plain; 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dc.title.pt_BR.fl_str_mv |
SmartDR: algorithms and techniques for fast detailed routing with good design rule handling |
title |
SmartDR: algorithms and techniques for fast detailed routing with good design rule handling |
spellingShingle |
SmartDR: algorithms and techniques for fast detailed routing with good design rule handling Gonçalves, Stephano Machado Moreira CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO Computação Detailed routing Pin access Path search Design rules ISPD 2018 contest Roteamento detalhado Acesso a pinos Busca de caminhos Regras de projeto ISPD 2018 contest |
title_short |
SmartDR: algorithms and techniques for fast detailed routing with good design rule handling |
title_full |
SmartDR: algorithms and techniques for fast detailed routing with good design rule handling |
title_fullStr |
SmartDR: algorithms and techniques for fast detailed routing with good design rule handling |
title_full_unstemmed |
SmartDR: algorithms and techniques for fast detailed routing with good design rule handling |
title_sort |
SmartDR: algorithms and techniques for fast detailed routing with good design rule handling |
author |
Gonçalves, Stephano Machado Moreira |
author_facet |
Gonçalves, Stephano Machado Moreira |
author_role |
author |
dc.contributor.authorLattes.pt_BR.fl_str_mv |
http://lattes.cnpq.br/8590220071194338 |
dc.contributor.advisorLattes.pt_BR.fl_str_mv |
http://lattes.cnpq.br/2054259785006041 |
dc.contributor.advisor-co1.fl_str_mv |
Rosa Junior, Leomar Soares da |
dc.contributor.advisor-co1Lattes.fl_str_mv |
http://lattes.cnpq.br/1423810014480514 |
dc.contributor.advisor1.fl_str_mv |
Marques, Felipe de Souza |
dc.contributor.author.fl_str_mv |
Gonçalves, Stephano Machado Moreira |
contributor_str_mv |
Rosa Junior, Leomar Soares da Marques, Felipe de Souza |
dc.subject.cnpq.fl_str_mv |
CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO |
topic |
CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO Computação Detailed routing Pin access Path search Design rules ISPD 2018 contest Roteamento detalhado Acesso a pinos Busca de caminhos Regras de projeto ISPD 2018 contest |
dc.subject.por.fl_str_mv |
Computação Detailed routing Pin access Path search Design rules ISPD 2018 contest Roteamento detalhado Acesso a pinos Busca de caminhos Regras de projeto ISPD 2018 contest |
description |
Detailed routing is one of the most challenging and time-consuming steps of the design of integrated circuits. The routing solution must obey all of the design rules so that the circuit can be properly manufactured. However, design rule handling may be very challenging, regarding its algorithmic solutions and implementation, and may easily lead to unfeasible runtimes. In order to make the detailed routing resolution more feasible, it is divided into two steps, where in the first, called initial detailed routing, an almost complete solution is achieved by relaxing design rules. In the second step the remaining design rule violations are solved. However, the more these rules are left to be handled in the second stage, the greater is the chance that they will not be completely solved, and this usually occurs. Thus, it is necessary to face the challenge of dealing with as many rules as possible in the first step without compromising the runtime. Thus, this work proposes an initial detailed router, called SmartDR, to meet these needs, that is, to provide a good design rule handling while keeping a good runtime. The main features of the router that meet these goals are pin access and path search techniques. This work proposes a novel pin access method, in which the pin access paths share the same routing resources and are dynamically legalized and implemented. It is also proposed a new path search algorithm, based on A *-interval search, which is aware of several design rules. A new method to improve the A * heuristic function is also proposed, taking into account the peculiarities of detailed routing, which leads to a better runtime. Using ISPD 2018 Contest benchmarks, all proposed methods were evaluated separately and altogether in the proposed router, which was compared with state-of-the-art routers. The experiments show that the proposed techniques contribute to runtime and design rule handling improvement, as well as it demonstrates that SmartDR is superior to the state-of-the-art routers in these metrics. |
publishDate |
2020 |
dc.date.accessioned.fl_str_mv |
2020-08-13T11:59:30Z |
dc.date.available.fl_str_mv |
2020-08-13T11:59:30Z |
dc.date.issued.fl_str_mv |
2020-01-15 |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/doctoralThesis |
format |
doctoralThesis |
status_str |
publishedVersion |
dc.identifier.citation.fl_str_mv |
GONÇALVES, Stèphano Machado Moreira. SmartDR: Algorithms and Techniques for Fast Detailed Routing with Good Design Rule Handling. 2020. 130p. Thesis (Doctorate in Computer Science) – Postgraduate Program in Computer Science, Technology Development Center, Federal University of Pelotas, Pelotas, 2020. |
dc.identifier.uri.fl_str_mv |
http://guaiaca.ufpel.edu.br/handle/prefix/6404 |
identifier_str_mv |
GONÇALVES, Stèphano Machado Moreira. SmartDR: Algorithms and Techniques for Fast Detailed Routing with Good Design Rule Handling. 2020. 130p. Thesis (Doctorate in Computer Science) – Postgraduate Program in Computer Science, Technology Development Center, Federal University of Pelotas, Pelotas, 2020. |
url |
http://guaiaca.ufpel.edu.br/handle/prefix/6404 |
dc.language.iso.fl_str_mv |
por |
language |
por |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.publisher.none.fl_str_mv |
Universidade Federal de Pelotas |
dc.publisher.program.fl_str_mv |
Programa de Pós-Graduação em Computação |
dc.publisher.initials.fl_str_mv |
UFPel |
dc.publisher.country.fl_str_mv |
Brasil |
dc.publisher.department.fl_str_mv |
Centro de Desenvolvimento Tecnológico |
publisher.none.fl_str_mv |
Universidade Federal de Pelotas |
dc.source.none.fl_str_mv |
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