Sharing-aware thread mapping in software transactional memory
Autor(a) principal: | |
---|---|
Data de Publicação: | 2021 |
Tipo de documento: | Tese |
Idioma: | por |
Título da fonte: | Repositório Institucional da UFPel - Guaiaca |
Texto Completo: | http://guaiaca.ufpel.edu.br/handle/prefix/7721 |
Resumo: | Software Transactional Memory (STM) is an alternative abstraction for thread synchronization in parallel programming. One advantage is simplicity since it is possible to replace the use of explicit locks with atomic blocks, while the STM runtime is responsible to ensure a consistent execution, for instance, without deadlocks and race conditions. Regarding STM performance, many studies already have been made focusing on reducing the number of transactional aborts and conflicts. However, in current multicore architectures with complex memory hierarchies, it is also important to consider where the memory of a program is allocated and how it is accessed. This thesis proposes the use of a technique called sharing-aware mapping, which maps threads to cores and memory pages to NUMA nodes based on their memory access behavior to achieve better performance in STM systems. The first major contribution of this thesis is a mechanism to detect sharing behavior directly inside the STM library by tracking and analyzing how threads perform STM operations. The collected information can be used to perform an optimized mapping of the application’s threads to cores in order to improve the efficiency of STM operations. The second contribution of this thesis is the characterization of the sharing behavior of STM applications by using information extracted from the STM runtime, providing information to guide thread mapping based on their sharing behavior. The third contribution is a mechanism to perform sharing-aware thread mapping in STM applications. We first introduce Static-SharingAware (SSA), which map threads to cores based on a previous analysis of the sharing behavior of STM applications. Next, we introduce STMap, an online, low overhead mechanism to detect the sharing behavior and perform the mapping directly inside the STM library, by tracking and analyzing how threads perform STM operations during the execution. In experiments with the STAMP benchmark suite and synthetic benchmarks, both mechanisms showed performance gains when compared to the default Linux scheduler. |
id |
UFPL_31a5110dac37e8e0c44fe7338b569d58 |
---|---|
oai_identifier_str |
oai:guaiaca.ufpel.edu.br:prefix/7721 |
network_acronym_str |
UFPL |
network_name_str |
Repositório Institucional da UFPel - Guaiaca |
repository_id_str |
|
spelling |
2021-06-18T22:19:03Z2021-06-18T22:19:03Z2021-04-28PASQUALIN, Douglas Pereira. Sharing-Aware Thread Mapping in Software Transactional Memory. Advisor: André Rauber Du Bois. 2021. 114 f. Thesis (Doctorate in Computer Science) – Technology Development Center, Federal University of Pelotas, Pelotas, 2021.http://guaiaca.ufpel.edu.br/handle/prefix/7721Software Transactional Memory (STM) is an alternative abstraction for thread synchronization in parallel programming. One advantage is simplicity since it is possible to replace the use of explicit locks with atomic blocks, while the STM runtime is responsible to ensure a consistent execution, for instance, without deadlocks and race conditions. Regarding STM performance, many studies already have been made focusing on reducing the number of transactional aborts and conflicts. However, in current multicore architectures with complex memory hierarchies, it is also important to consider where the memory of a program is allocated and how it is accessed. This thesis proposes the use of a technique called sharing-aware mapping, which maps threads to cores and memory pages to NUMA nodes based on their memory access behavior to achieve better performance in STM systems. The first major contribution of this thesis is a mechanism to detect sharing behavior directly inside the STM library by tracking and analyzing how threads perform STM operations. The collected information can be used to perform an optimized mapping of the application’s threads to cores in order to improve the efficiency of STM operations. The second contribution of this thesis is the characterization of the sharing behavior of STM applications by using information extracted from the STM runtime, providing information to guide thread mapping based on their sharing behavior. The third contribution is a mechanism to perform sharing-aware thread mapping in STM applications. We first introduce Static-SharingAware (SSA), which map threads to cores based on a previous analysis of the sharing behavior of STM applications. Next, we introduce STMap, an online, low overhead mechanism to detect the sharing behavior and perform the mapping directly inside the STM library, by tracking and analyzing how threads perform STM operations during the execution. In experiments with the STAMP benchmark suite and synthetic benchmarks, both mechanisms showed performance gains when compared to the default Linux scheduler.Memória Transacional em Software (MTS) é uma abstração para a sincronização de threads na programação paralela. Uma de suas vantagens é a simplicidade, pois é possível substituir o uso de bloqueios por blocos atômicos. Além disso, a implementação de MTS é responsável por garantir uma execução consistente, por exemplo, sem deadlocks ou condições de corrida. Com relação ao desempenho de MTS, existem muitos estudos focados na redução do número de cancelamentos. Contudo, nas atuais arquiteturas multicore, com complexas hierarquias de memória, é também importante considerar onde a memória do programa está alocada e como ela é acessada. Esta tese propõe o uso de uma técnica chamada mapeamento baseado em compartilhamento a qual consiste em mapear threads para núcleos de processamento e páginas de memória para nós NUMA com base no seu padrão de acesso à memória para melhorar o desempenho de aplicações que utilizam MTS. A primeira contribuição desta tese é um mecanismo para detectar o padrão de acesso à memória em bibliotecas de MTS. Ele consiste em rastrear e analisar como threads executam operações de MTS. As informações coletadas podem ser utilizadas para criar um mapeamento otimizado de threads para núcleos de processamento, com o objetivo de melhorar a eficiência das operações de MTS. A segunda contribuição é a caracterização do padrão de acesso à memória de aplicações que utilizam MTS, fornecendo informações para guiar um mapeamento de threads com base no padrão de compartilhamento da aplicação. A terceira contribuição é um mecanismo para efetuar um mapeamento de threads baseado em compartilhamento para aplicações que utilizam MTS. Primeiramente é apresentado Static-SharingAware (SSA), que baseado em uma análise prévia do padrão de compartilhamento da aplicação, mapeia threads para núcleos de processamento de forma estática. Após, é apresentado STMap, um mecanismo que opera dinamicamente e com baixa sobrecarga, com o objetivo de detectar o padrão de acesso à memoria e efetuar o mapeamento de threads durante a execução do programa. Em experimentos com o benchmark STAMP e outras aplicações sintéticas, ambos mecanismos apresentaram ganhos de desempenho quando comparados com o escalonador padrão do Linux.Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - CAPESporUniversidade Federal de PelotasPrograma de Pós-Graduação em ComputaçãoUFPelBrasilCentro de Desenvolvimento TecnológicoCNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAOComputaçãoSoftware transactional memorySharing-awareThread mappingCommunicationMemória transacional em softwareSensibilidade ao compartilhamentoMapeamento de threadComunicaçãoSharing-aware thread mapping in software transactional memoryMapeamento de threads baseado em compartilhamento em memórias transacionais em softwareinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/doctoralThesishttp://lattes.cnpq.br/3523820267263034http://lattes.cnpq.br/3277487290886063Diener, Matthiashttp://lattes.cnpq.br/8653611969517458Pilla, Maurício Limahttp://lattes.cnpq.br/5401660213198750Du Bois, André RauberPasqualin, Douglas Pereirainfo:eu-repo/semantics/openAccessreponame:Repositório Institucional da UFPel - Guaiacainstname:Universidade Federal de Pelotas (UFPEL)instacron:UFPELTEXTTese_Douglas_Pereira.pdf.txtTese_Douglas_Pereira.pdf.txtExtracted texttext/plain246679http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/6/Tese_Douglas_Pereira.pdf.txtce43c3150fc1e6fff1f555d2f608bce6MD56open accessTHUMBNAILTese_Douglas_Pereira.pdf.jpgTese_Douglas_Pereira.pdf.jpgGenerated Thumbnailimage/jpeg1226http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/7/Tese_Douglas_Pereira.pdf.jpgaf63409ee014241058fabf5ad6af0a29MD57open accessORIGINALTese_Douglas_Pereira.pdfTese_Douglas_Pereira.pdfapplication/pdf3080057http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/1/Tese_Douglas_Pereira.pdfa579b4b2fc9719d136a4c892952b07beMD51open accessCC-LICENSElicense_urllicense_urltext/plain; charset=utf-849http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/2/license_url924993ce0b3ba389f79f32a1b2735415MD52open accesslicense_textlicense_texttext/html; charset=utf-80http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/3/license_textd41d8cd98f00b204e9800998ecf8427eMD53open accesslicense_rdflicense_rdfapplication/rdf+xml; charset=utf-80http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/4/license_rdfd41d8cd98f00b204e9800998ecf8427eMD54open accessLICENSElicense.txtlicense.txttext/plain; charset=utf-81866http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/5/license.txt43cd690d6a359e86c1fe3d5b7cba0c9bMD55open accessprefix/77212023-07-13 06:12:44.038open accessoai:guaiaca.ufpel.edu.br:prefix/7721TElDRU7Dh0EgREUgRElTVFJJQlVJw4fDg08gTsODTy1FWENMVVNJVkEKCkNvbSBhIGFwcmVzZW50YcOnw6NvIGRlc3RhIGxpY2Vuw6dhLCB2b2PDqiAobyBhdXRvciAoZXMpIG91IG8gdGl0dWxhciBkb3MgZGlyZWl0b3MgZGUgYXV0b3IpIGNvbmNlZGUgYW8gUmVwb3NpdMOzcmlvIApJbnN0aXR1Y2lvbmFsIG8gZGlyZWl0byBuw6NvLWV4Y2x1c2l2byBkZSByZXByb2R1emlyLCAgdHJhZHV6aXIgKGNvbmZvcm1lIGRlZmluaWRvIGFiYWl4byksIGUvb3UgZGlzdHJpYnVpciBhIApzdWEgcHVibGljYcOnw6NvIChpbmNsdWluZG8gbyByZXN1bW8pIHBvciB0b2RvIG8gbXVuZG8gbm8gZm9ybWF0byBpbXByZXNzbyBlIGVsZXRyw7RuaWNvIGUgZW0gcXVhbHF1ZXIgbWVpbywgaW5jbHVpbmRvIG9zIApmb3JtYXRvcyDDoXVkaW8gb3UgdsOtZGVvLgoKVm9jw6ogY29uY29yZGEgcXVlIG8gRGVwb3NpdGEgcG9kZSwgc2VtIGFsdGVyYXIgbyBjb250ZcO6ZG8sIHRyYW5zcG9yIGEgc3VhIHB1YmxpY2HDp8OjbyBwYXJhIHF1YWxxdWVyIG1laW8gb3UgZm9ybWF0byAKcGFyYSBmaW5zIGRlIHByZXNlcnZhw6fDo28uCgpWb2PDqiB0YW1iw6ltIGNvbmNvcmRhIHF1ZSBvIERlcG9zaXRhIHBvZGUgbWFudGVyIG1haXMgZGUgdW1hIGPDs3BpYSBkZSBzdWEgcHVibGljYcOnw6NvIHBhcmEgZmlucyBkZSBzZWd1cmFuw6dhLCBiYWNrLXVwIAplIHByZXNlcnZhw6fDo28uCgpWb2PDqiBkZWNsYXJhIHF1ZSBhIHN1YSBwdWJsaWNhw6fDo28gw6kgb3JpZ2luYWwgZSBxdWUgdm9jw6ogdGVtIG8gcG9kZXIgZGUgY29uY2VkZXIgb3MgZGlyZWl0b3MgY29udGlkb3MgbmVzdGEgbGljZW7Dp2EuIApWb2PDqiB0YW1iw6ltIGRlY2xhcmEgcXVlIG8gZGVww7NzaXRvIGRhIHN1YSBwdWJsaWNhw6fDo28gbsOjbywgcXVlIHNlamEgZGUgc2V1IGNvbmhlY2ltZW50bywgaW5mcmluZ2UgZGlyZWl0b3MgYXV0b3JhaXMgCmRlIG5pbmd1w6ltLgoKQ2FzbyBhIHN1YSBwdWJsaWNhw6fDo28gY29udGVuaGEgbWF0ZXJpYWwgcXVlIHZvY8OqIG7Do28gcG9zc3VpIGEgdGl0dWxhcmlkYWRlIGRvcyBkaXJlaXRvcyBhdXRvcmFpcywgdm9jw6ogZGVjbGFyYSBxdWUgCm9idGV2ZSBhIHBlcm1pc3PDo28gaXJyZXN0cml0YSBkbyBkZXRlbnRvciBkb3MgZGlyZWl0b3MgYXV0b3JhaXMgcGFyYSBjb25jZWRlciBhbyBEZXBvc2l0YSBvcyBkaXJlaXRvcyBhcHJlc2VudGFkb3MgCm5lc3RhIGxpY2Vuw6dhLCBlIHF1ZSBlc3NlIG1hdGVyaWFsIGRlIHByb3ByaWVkYWRlIGRlIHRlcmNlaXJvcyBlc3TDoSBjbGFyYW1lbnRlIGlkZW50aWZpY2FkbyBlIHJlY29uaGVjaWRvIG5vIHRleHRvIApvdSBubyBjb250ZcO6ZG8gZGEgcHVibGljYcOnw6NvIG9yYSBkZXBvc2l0YWRhLgoKQ0FTTyBBIFBVQkxJQ0HDh8ODTyBPUkEgREVQT1NJVEFEQSBURU5IQSBTSURPIFJFU1VMVEFETyBERSBVTSBQQVRST0PDjU5JTyBPVSBBUE9JTyBERSBVTUEgQUfDik5DSUEgREUgRk9NRU5UTyBPVSBPVVRSTyAKT1JHQU5JU01PLCBWT0PDiiBERUNMQVJBIFFVRSBSRVNQRUlUT1UgVE9ET1MgRSBRVUFJU1FVRVIgRElSRUlUT1MgREUgUkVWSVPDg08gQ09NTyBUQU1Cw4lNIEFTIERFTUFJUyBPQlJJR0HDh8OVRVMgCkVYSUdJREFTIFBPUiBDT05UUkFUTyBPVSBBQ09SRE8uCgpPIERlcG9zaXRhIHNlIGNvbXByb21ldGUgYSBpZGVudGlmaWNhciBjbGFyYW1lbnRlIG8gc2V1IG5vbWUgKHMpIG91IG8ocykgbm9tZShzKSBkbyhzKSBkZXRlbnRvcihlcykgZG9zIGRpcmVpdG9zIAphdXRvcmFpcyBkYSBwdWJsaWNhw6fDo28sIGUgbsOjbyBmYXLDoSBxdWFscXVlciBhbHRlcmHDp8OjbywgYWzDqW0gZGFxdWVsYXMgY29uY2VkaWRhcyBwb3IgZXN0YSBsaWNlbsOnYS4KRepositório InstitucionalPUBhttp://repositorio.ufpel.edu.br/oai/requestrippel@ufpel.edu.br || repositorio@ufpel.edu.br || aline.batista@ufpel.edu.bropendoar:2023-07-13T09:12:44Repositório Institucional da UFPel - Guaiaca - Universidade Federal de Pelotas (UFPEL)false |
dc.title.pt_BR.fl_str_mv |
Sharing-aware thread mapping in software transactional memory |
dc.title.alternative.pt_BR.fl_str_mv |
Mapeamento de threads baseado em compartilhamento em memórias transacionais em software |
title |
Sharing-aware thread mapping in software transactional memory |
spellingShingle |
Sharing-aware thread mapping in software transactional memory Pasqualin, Douglas Pereira CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO Computação Software transactional memory Sharing-aware Thread mapping Communication Memória transacional em software Sensibilidade ao compartilhamento Mapeamento de thread Comunicação |
title_short |
Sharing-aware thread mapping in software transactional memory |
title_full |
Sharing-aware thread mapping in software transactional memory |
title_fullStr |
Sharing-aware thread mapping in software transactional memory |
title_full_unstemmed |
Sharing-aware thread mapping in software transactional memory |
title_sort |
Sharing-aware thread mapping in software transactional memory |
author |
Pasqualin, Douglas Pereira |
author_facet |
Pasqualin, Douglas Pereira |
author_role |
author |
dc.contributor.authorLattes.pt_BR.fl_str_mv |
http://lattes.cnpq.br/3523820267263034 |
dc.contributor.advisorLattes.pt_BR.fl_str_mv |
http://lattes.cnpq.br/3277487290886063 |
dc.contributor.advisor-co1.fl_str_mv |
Diener, Matthias |
dc.contributor.advisor-co1Lattes.fl_str_mv |
http://lattes.cnpq.br/8653611969517458 |
dc.contributor.advisor-co2.fl_str_mv |
Pilla, Maurício Lima |
dc.contributor.advisor-co2Lattes.fl_str_mv |
http://lattes.cnpq.br/5401660213198750 |
dc.contributor.advisor1.fl_str_mv |
Du Bois, André Rauber |
dc.contributor.author.fl_str_mv |
Pasqualin, Douglas Pereira |
contributor_str_mv |
Diener, Matthias Pilla, Maurício Lima Du Bois, André Rauber |
dc.subject.cnpq.fl_str_mv |
CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO |
topic |
CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO Computação Software transactional memory Sharing-aware Thread mapping Communication Memória transacional em software Sensibilidade ao compartilhamento Mapeamento de thread Comunicação |
dc.subject.por.fl_str_mv |
Computação Software transactional memory Sharing-aware Thread mapping Communication Memória transacional em software Sensibilidade ao compartilhamento Mapeamento de thread Comunicação |
description |
Software Transactional Memory (STM) is an alternative abstraction for thread synchronization in parallel programming. One advantage is simplicity since it is possible to replace the use of explicit locks with atomic blocks, while the STM runtime is responsible to ensure a consistent execution, for instance, without deadlocks and race conditions. Regarding STM performance, many studies already have been made focusing on reducing the number of transactional aborts and conflicts. However, in current multicore architectures with complex memory hierarchies, it is also important to consider where the memory of a program is allocated and how it is accessed. This thesis proposes the use of a technique called sharing-aware mapping, which maps threads to cores and memory pages to NUMA nodes based on their memory access behavior to achieve better performance in STM systems. The first major contribution of this thesis is a mechanism to detect sharing behavior directly inside the STM library by tracking and analyzing how threads perform STM operations. The collected information can be used to perform an optimized mapping of the application’s threads to cores in order to improve the efficiency of STM operations. The second contribution of this thesis is the characterization of the sharing behavior of STM applications by using information extracted from the STM runtime, providing information to guide thread mapping based on their sharing behavior. The third contribution is a mechanism to perform sharing-aware thread mapping in STM applications. We first introduce Static-SharingAware (SSA), which map threads to cores based on a previous analysis of the sharing behavior of STM applications. Next, we introduce STMap, an online, low overhead mechanism to detect the sharing behavior and perform the mapping directly inside the STM library, by tracking and analyzing how threads perform STM operations during the execution. In experiments with the STAMP benchmark suite and synthetic benchmarks, both mechanisms showed performance gains when compared to the default Linux scheduler. |
publishDate |
2021 |
dc.date.accessioned.fl_str_mv |
2021-06-18T22:19:03Z |
dc.date.available.fl_str_mv |
2021-06-18T22:19:03Z |
dc.date.issued.fl_str_mv |
2021-04-28 |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/doctoralThesis |
format |
doctoralThesis |
status_str |
publishedVersion |
dc.identifier.citation.fl_str_mv |
PASQUALIN, Douglas Pereira. Sharing-Aware Thread Mapping in Software Transactional Memory. Advisor: André Rauber Du Bois. 2021. 114 f. Thesis (Doctorate in Computer Science) – Technology Development Center, Federal University of Pelotas, Pelotas, 2021. |
dc.identifier.uri.fl_str_mv |
http://guaiaca.ufpel.edu.br/handle/prefix/7721 |
identifier_str_mv |
PASQUALIN, Douglas Pereira. Sharing-Aware Thread Mapping in Software Transactional Memory. Advisor: André Rauber Du Bois. 2021. 114 f. Thesis (Doctorate in Computer Science) – Technology Development Center, Federal University of Pelotas, Pelotas, 2021. |
url |
http://guaiaca.ufpel.edu.br/handle/prefix/7721 |
dc.language.iso.fl_str_mv |
por |
language |
por |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.publisher.none.fl_str_mv |
Universidade Federal de Pelotas |
dc.publisher.program.fl_str_mv |
Programa de Pós-Graduação em Computação |
dc.publisher.initials.fl_str_mv |
UFPel |
dc.publisher.country.fl_str_mv |
Brasil |
dc.publisher.department.fl_str_mv |
Centro de Desenvolvimento Tecnológico |
publisher.none.fl_str_mv |
Universidade Federal de Pelotas |
dc.source.none.fl_str_mv |
reponame:Repositório Institucional da UFPel - Guaiaca instname:Universidade Federal de Pelotas (UFPEL) instacron:UFPEL |
instname_str |
Universidade Federal de Pelotas (UFPEL) |
instacron_str |
UFPEL |
institution |
UFPEL |
reponame_str |
Repositório Institucional da UFPel - Guaiaca |
collection |
Repositório Institucional da UFPel - Guaiaca |
bitstream.url.fl_str_mv |
http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/6/Tese_Douglas_Pereira.pdf.txt http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/7/Tese_Douglas_Pereira.pdf.jpg http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/1/Tese_Douglas_Pereira.pdf http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/2/license_url http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/3/license_text http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/4/license_rdf http://guaiaca.ufpel.edu.br/xmlui/bitstream/prefix/7721/5/license.txt |
bitstream.checksum.fl_str_mv |
ce43c3150fc1e6fff1f555d2f608bce6 af63409ee014241058fabf5ad6af0a29 a579b4b2fc9719d136a4c892952b07be 924993ce0b3ba389f79f32a1b2735415 d41d8cd98f00b204e9800998ecf8427e d41d8cd98f00b204e9800998ecf8427e 43cd690d6a359e86c1fe3d5b7cba0c9b |
bitstream.checksumAlgorithm.fl_str_mv |
MD5 MD5 MD5 MD5 MD5 MD5 MD5 |
repository.name.fl_str_mv |
Repositório Institucional da UFPel - Guaiaca - Universidade Federal de Pelotas (UFPEL) |
repository.mail.fl_str_mv |
rippel@ufpel.edu.br || repositorio@ufpel.edu.br || aline.batista@ufpel.edu.br |
_version_ |
1801846978825420800 |